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III/V Nanowire FETs for CMOS?

Wernersson, Lars-Erik LU (2008) 3rd International SiGe, Ge, and Related Compounds Symposium 16(10). p.741-743
Abstract
III/V MOS transistors are currently attracting considerable attention. The main driving force is that the advantageous transport properties in III/V materials are expected to increase the drive current in the MOS transistors. Major challenges for the III/V MOS technologies include the growth of high-quality III/V materials oil Si Substrates and the control of the MOS interface. Using the nanowire technology, we have recently demonstrated enhancement mode operation of 50 nm L-g InAs nanowire wrap-gate transistors in a vertical configuration. They demonstrate a transconductance of 0.5 S/mm, an inverse sub-threshold slope of about 80 mV/dec., and an I-on/I-off ratio > 1000 for a drive voltage of V-d=0.5 V. These results show promise for... (More)
III/V MOS transistors are currently attracting considerable attention. The main driving force is that the advantageous transport properties in III/V materials are expected to increase the drive current in the MOS transistors. Major challenges for the III/V MOS technologies include the growth of high-quality III/V materials oil Si Substrates and the control of the MOS interface. Using the nanowire technology, we have recently demonstrated enhancement mode operation of 50 nm L-g InAs nanowire wrap-gate transistors in a vertical configuration. They demonstrate a transconductance of 0.5 S/mm, an inverse sub-threshold slope of about 80 mV/dec., and an I-on/I-off ratio > 1000 for a drive voltage of V-d=0.5 V. These results show promise for the use of nanowires in CMOS applications. (Less)
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
host publication
Sige, Ge, And Related Compounds 3: Materials, Processing, And Devices
volume
16
issue
10
pages
741 - 743
publisher
Electrochemical Society
conference name
3rd International SiGe, Ge, and Related Compounds Symposium
conference location
Honolulu, HI, United States
conference dates
2008-10-12 - 2008-10-17
external identifiers
  • wos:000273336700083
  • scopus:63149104037
ISSN
1938-5862
1938-6737
language
English
LU publication?
yes
id
2241461b-3371-4395-b278-4ae602fe37fb (old id 1546404)
date added to LUP
2016-04-01 11:40:45
date last changed
2024-01-07 16:22:57
@inproceedings{2241461b-3371-4395-b278-4ae602fe37fb,
  abstract     = {{III/V MOS transistors are currently attracting considerable attention. The main driving force is that the advantageous transport properties in III/V materials are expected to increase the drive current in the MOS transistors. Major challenges for the III/V MOS technologies include the growth of high-quality III/V materials oil Si Substrates and the control of the MOS interface. Using the nanowire technology, we have recently demonstrated enhancement mode operation of 50 nm L-g InAs nanowire wrap-gate transistors in a vertical configuration. They demonstrate a transconductance of 0.5 S/mm, an inverse sub-threshold slope of about 80 mV/dec., and an I-on/I-off ratio > 1000 for a drive voltage of V-d=0.5 V. These results show promise for the use of nanowires in CMOS applications.}},
  author       = {{Wernersson, Lars-Erik}},
  booktitle    = {{Sige, Ge, And Related Compounds 3: Materials, Processing, And Devices}},
  issn         = {{1938-5862}},
  language     = {{eng}},
  number       = {{10}},
  pages        = {{741--743}},
  publisher    = {{Electrochemical Society}},
  title        = {{III/V Nanowire FETs for CMOS?}},
  volume       = {{16}},
  year         = {{2008}},
}