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Area-efficient configurable high-throughput signal detector supporting multiple MIMO modes

Liu, Liang LU ; Löfgren, Johan LU and Nilsson, Peter LU (2012) In IEEE Transactions on Circuits and Systems Part 1: Regular Papers 59(9). p.2085-2096
Abstract (Swedish)
Abstract in Undetermined

This paper presents a low-complexity, highthroughput,

and configurable multiple-input multiple-output

(MIMO) signal detector design solution targeting the emerging

Long-Term-Evolution-Advanced (LTE-A) downlink. The detector

supports signal detection of multiple MIMO modes, which

are spatial-multiplexing (SM), spatial-diversity (SD), and spacedivision-multiple-access (SDMA). Area-efficiency is achieved by

algorithm and architecture co-design where low-complexity, nearmaximum-likelihood (ML) detection algorithms are proposed

for these three MIMO modes respectively while keeping in

mind that the operations can be reused among... (More)
Abstract in Undetermined

This paper presents a low-complexity, highthroughput,

and configurable multiple-input multiple-output

(MIMO) signal detector design solution targeting the emerging

Long-Term-Evolution-Advanced (LTE-A) downlink. The detector

supports signal detection of multiple MIMO modes, which

are spatial-multiplexing (SM), spatial-diversity (SD), and spacedivision-multiple-access (SDMA). Area-efficiency is achieved by

algorithm and architecture co-design where low-complexity, nearmaximum-likelihood (ML) detection algorithms are proposed

for these three MIMO modes respectively while keeping in

mind that the operations can be reused among different modes.

A parallel multistage VLSI architecture is accordingly developed

that achieves high detection throughput and run-time

reconfigurability without extra hardware overhead. To further

improve the implementation efficiency, the detector also adopts an

orthogonal-real-value-decomposition (ORVD) aided candidatesharing

technology for low-cost partial Euclidean distance calculation

and a distributed interference cancelation scheme for a

critical path delay reduction. The proposed multi-mode MIMO

detector has been implemented using a 65-nm CMOS technology

with a core area of 0.18 mm2 (the equivalent gate-count is 88.7K),

representing a 22% less hardware-resource use than the state

of art in the open literature. Operating at 1.2-V supply with

250-MHz clock, the detector achieves a 3Gb/s throughput when

configured to the 4x4 64-QAM spatial-multiplexing mode, which

is about 1.5 times over previous implementations. Moreover, the

normalized energy consumption of 44.1 pJ/b is shown to be the

most energy-efficient design compared with other works. (Less)
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
spatial-diversity (SD), spatial-multiplexing (SM), signal detector, Multiple-input multiple-output (MIMO), spacedivision-multiple-access (SDMA), configurable, very-large scale integration (VLSI).
in
IEEE Transactions on Circuits and Systems Part 1: Regular Papers
volume
59
issue
9
pages
2085 - 2096
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • wos:000308109600024
  • scopus:84865700118
ISSN
1549-8328
language
English
LU publication?
yes
id
e3867557-e8a6-4f34-b465-549af94dad55 (old id 2276781)
date added to LUP
2012-01-10 13:46:01
date last changed
2017-09-10 04:44:10
@article{e3867557-e8a6-4f34-b465-549af94dad55,
  abstract     = {<b>Abstract in Undetermined</b><br/><br>
This paper presents a low-complexity, highthroughput,<br/><br>
and configurable multiple-input multiple-output<br/><br>
(MIMO) signal detector design solution targeting the emerging<br/><br>
Long-Term-Evolution-Advanced (LTE-A) downlink. The detector<br/><br>
supports signal detection of multiple MIMO modes, which<br/><br>
are spatial-multiplexing (SM), spatial-diversity (SD), and spacedivision-multiple-access (SDMA). Area-efficiency is achieved by<br/><br>
algorithm and architecture co-design where low-complexity, nearmaximum-likelihood (ML) detection algorithms are proposed<br/><br>
for these three MIMO modes respectively while keeping in<br/><br>
mind that the operations can be reused among different modes.<br/><br>
A parallel multistage VLSI architecture is accordingly developed<br/><br>
that achieves high detection throughput and run-time<br/><br>
reconfigurability without extra hardware overhead. To further<br/><br>
improve the implementation efficiency, the detector also adopts an<br/><br>
orthogonal-real-value-decomposition (ORVD) aided candidatesharing<br/><br>
technology for low-cost partial Euclidean distance calculation<br/><br>
and a distributed interference cancelation scheme for a<br/><br>
critical path delay reduction. The proposed multi-mode MIMO<br/><br>
detector has been implemented using a 65-nm CMOS technology<br/><br>
with a core area of 0.18 mm2 (the equivalent gate-count is 88.7K),<br/><br>
representing a 22% less hardware-resource use than the state<br/><br>
of art in the open literature. Operating at 1.2-V supply with<br/><br>
250-MHz clock, the detector achieves a 3Gb/s throughput when<br/><br>
configured to the 4x4 64-QAM spatial-multiplexing mode, which<br/><br>
is about 1.5 times over previous implementations. Moreover, the<br/><br>
normalized energy consumption of 44.1 pJ/b is shown to be the<br/><br>
most energy-efficient design compared with other works.},
  author       = {Liu, Liang and Löfgren, Johan and Nilsson, Peter},
  issn         = {1549-8328},
  keyword      = {spatial-diversity (SD),spatial-multiplexing (SM),signal detector,Multiple-input multiple-output (MIMO),spacedivision-multiple-access (SDMA),configurable,very-large scale integration (VLSI).},
  language     = {eng},
  number       = {9},
  pages        = {2085--2096},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Transactions on Circuits and Systems Part 1: Regular Papers},
  title        = {Area-efficient configurable high-throughput signal detector supporting multiple MIMO modes},
  volume       = {59},
  year         = {2012},
}