Power Constrained Preemptive TAM Scheduling
(2002) 7th IEEE European Test Workshop,2002 p.119-119- Abstract
- We integrate scan-chain partitioning and preemptive test access mechanism (TAM) scheduling for core-based systems under power constraint. We also outline a flexible power conscious test wrapper to increase the flexibility in the scheduling process by (1) allowing several different bandwidths at cores and (2) controlling the cores test power consumption, which makes it possible to increase the test clock. We model the scheduling problem as a Bin-packing problem and we discuss the transformations: (1) TAM-time and (2) power-time and the possibilities to achieve an optimal solution and the limitations. We have implemented our proposed preemptive TAM scheduling algorithm and through experiments we demonstrate its efficiency.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/2341111
- author
- Larsson, Erik LU and Fujiwara, Hideo
- publishing date
- 2002
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- scan-chain partitioning, core-based systems, power constraint, test access mechanism, TAM, preemptive TAM scheduling
- host publication
- [Host publication title missing]
- pages
- 119 - 119
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- 7th IEEE European Test Workshop,2002
- conference location
- Corfu, Greece
- conference dates
- 2002-05-26 - 2002-05-29
- external identifiers
-
- scopus:84931351424
- ISSN
- 1530-1877
- ISBN
- 0-7695-1715-3
- DOI
- 10.1109/ETW.2002.1029648
- language
- English
- LU publication?
- no
- id
- 8034575f-e385-48b3-8668-1ec9e34fdb22 (old id 2341111)
- date added to LUP
- 2016-04-01 15:32:07
- date last changed
- 2022-01-28 05:49:05
@inproceedings{8034575f-e385-48b3-8668-1ec9e34fdb22, abstract = {{We integrate scan-chain partitioning and preemptive test access mechanism (TAM) scheduling for core-based systems under power constraint. We also outline a flexible power conscious test wrapper to increase the flexibility in the scheduling process by (1) allowing several different bandwidths at cores and (2) controlling the cores test power consumption, which makes it possible to increase the test clock. We model the scheduling problem as a Bin-packing problem and we discuss the transformations: (1) TAM-time and (2) power-time and the possibilities to achieve an optimal solution and the limitations. We have implemented our proposed preemptive TAM scheduling algorithm and through experiments we demonstrate its efficiency.}}, author = {{Larsson, Erik and Fujiwara, Hideo}}, booktitle = {{[Host publication title missing]}}, isbn = {{0-7695-1715-3}}, issn = {{1530-1877}}, keywords = {{scan-chain partitioning; core-based systems; power constraint; test access mechanism; TAM; preemptive TAM scheduling}}, language = {{eng}}, pages = {{119--119}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{Power Constrained Preemptive TAM Scheduling}}, url = {{http://dx.doi.org/10.1109/ETW.2002.1029648}}, doi = {{10.1109/ETW.2002.1029648}}, year = {{2002}}, }