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An Integrated System-Level Design for Testability Methodology An Integrated System-Level Design for Testability Methodology

Larsson, Erik LU (2000) In Linköping Studies in Science and Technology, Dissertations
Abstract
HARDWARE TESTING is commonly used to check whether faults exist in a digital system. Much research has been devoted to the development of advanced hardware testing techniques and methods to support design for testability (DFT). However, most existing DFT methods deal only with testability issues at low abstraction levels, while new modelling and design techniques have been developed for design at high abstraction levels due to the increasing complexity of digital systems.</p><p>The main objective of this thesis is to address test problems faced by the designer at the system level. Considering the testability issues at early design stages can reduce the test problems at lower abstraction levels and lead to the reduction of the... (More)
HARDWARE TESTING is commonly used to check whether faults exist in a digital system. Much research has been devoted to the development of advanced hardware testing techniques and methods to support design for testability (DFT). However, most existing DFT methods deal only with testability issues at low abstraction levels, while new modelling and design techniques have been developed for design at high abstraction levels due to the increasing complexity of digital systems.</p><p>The main objective of this thesis is to address test problems faced by the designer at the system level. Considering the testability issues at early design stages can reduce the test problems at lower abstraction levels and lead to the reduction of the total test cost. The objective is achieved by developing several new methods to help the designers to analyze the testability and improve it as well as to perform test scheduling and test access mechanism design.</p><p>The developed methods have been integrated into a systematic methodology for the testing of system-on-chip. The methodology consists of several efficient techniques to support test scheduling, test access mechanism design, test set selection, test parallelization and test resource placement. An optimization strategy has also been developed which minimizes test application time and test access mechanism cost, while considering constraints on tests, power consumption and test resources.</p><p>Several novel approaches to analyzing the testability of a system at behavioral level and register-transfer level have also been developed. Based on the analysis results, difficult-to-test parts of a design are identified and modified by transformations to improve testability of the whole system.</p><p>Extensive experiments, based on benchmark examples and industrial designs, have been carried out to demonstrate the usefulness and efficiency of the proposed methodology and techniques. The experimental results show clearly the advantages of considering testability in the early design stages at the system level. (Less)
Please use this url to cite or link to this publication:
author
opponent
  • unknown], [unknown
publishing date
type
Thesis
publication status
published
subject
keywords
Digital systems, Test design, System-on-chip, Hardware, Systems
in
Linköping Studies in Science and Technology, Dissertations
pages
282 pages
publisher
Linköping University Electronic Press
defense location
Estraden, Hus E, Campus Valla, Linköpings universitet, Linköping
defense date
2000-12-19 13:15
ISSN
0345-7524
ISBN
91-7219-890-7
language
English
LU publication?
no
id
f3576632-6a5d-4652-b5f7-4f08a79999ad (old id 2341476)
date added to LUP
2012-02-10 14:27:18
date last changed
2016-09-19 08:44:57
@phdthesis{f3576632-6a5d-4652-b5f7-4f08a79999ad,
  abstract     = {HARDWARE TESTING is commonly used to check whether faults exist in a digital system. Much research has been devoted to the development of advanced hardware testing techniques and methods to support design for testability (DFT). However, most existing DFT methods deal only with testability issues at low abstraction levels, while new modelling and design techniques have been developed for design at high abstraction levels due to the increasing complexity of digital systems.&lt;/p&gt;&lt;p&gt;The main objective of this thesis is to address test problems faced by the designer at the system level. Considering the testability issues at early design stages can reduce the test problems at lower abstraction levels and lead to the reduction of the total test cost. The objective is achieved by developing several new methods to help the designers to analyze the testability and improve it as well as to perform test scheduling and test access mechanism design.&lt;/p&gt;&lt;p&gt;The developed methods have been integrated into a systematic methodology for the testing of system-on-chip. The methodology consists of several efficient techniques to support test scheduling, test access mechanism design, test set selection, test parallelization and test resource placement. An optimization strategy has also been developed which minimizes test application time and test access mechanism cost, while considering constraints on tests, power consumption and test resources.&lt;/p&gt;&lt;p&gt;Several novel approaches to analyzing the testability of a system at behavioral level and register-transfer level have also been developed. Based on the analysis results, difficult-to-test parts of a design are identified and modified by transformations to improve testability of the whole system.&lt;/p&gt;&lt;p&gt;Extensive experiments, based on benchmark examples and industrial designs, have been carried out to demonstrate the usefulness and efficiency of the proposed methodology and techniques. The experimental results show clearly the advantages of considering testability in the early design stages at the system level.},
  author       = {Larsson, Erik},
  isbn         = {91-7219-890-7},
  issn         = {0345-7524},
  keyword      = {Digital systems,Test design,System-on-chip,Hardware,Systems},
  language     = {eng},
  pages        = {282},
  publisher    = {Linköping University Electronic Press},
  series       = {Linköping Studies in Science and Technology, Dissertations},
  title        = {An Integrated System-Level Design for Testability Methodology An Integrated System-Level Design for Testability Methodology},
  year         = {2000},
}