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A distributed capacitance analysis of co-planar inductors for a CMOS QVCO with varactor tuned buffer stage

Troedsson, Niklas LU and Sjöland, Henrik LU (2005) In Analog Integrated Circuits and Signal Processing 42(1). p.7-19
Abstract
A quadrature voltage controlled oscillator (QVCO) topology exhibiting low power consumption and high phase noise performance at low supply voltages is presented. The QVCO buffer includes varactors to maximize the output voltage and minimize the current consumption. Microstrip theory and the principle of conservation of energy have been used to evaluate the distributed capacitances of symmetrical inductors to better predict the resonance frequency. The QVCO is implemented in a 0.25 mum CMOS process from Agere Systems. The total current consumption including the buffer is 5.4 mA at 1.3 V supply, where of the QVCO uses 2.0 mA. The phase noise measures below - 138 dBc/Hz at 3 MHz offset frequency over the 8.9% tuning range 1.715 GHz 1.875 GHz.
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
VCO, CMOS, microstrip theory, capacitances, parasitic distributed, quadrature oscillator, inductor modeling, low voltage, on-chip, inductor
in
Analog Integrated Circuits and Signal Processing
volume
42
issue
1
pages
7 - 19
publisher
Springer
external identifiers
  • wos:000223983300002
  • scopus:4544368583
ISSN
0925-1030
DOI
10.1007/s10470-004-6843-1
language
English
LU publication?
yes
id
200f2e60-21dd-4f44-b105-1e693434c09c (old id 267650)
date added to LUP
2007-08-06 11:03:33
date last changed
2017-01-01 06:38:48
@article{200f2e60-21dd-4f44-b105-1e693434c09c,
  abstract     = {A quadrature voltage controlled oscillator (QVCO) topology exhibiting low power consumption and high phase noise performance at low supply voltages is presented. The QVCO buffer includes varactors to maximize the output voltage and minimize the current consumption. Microstrip theory and the principle of conservation of energy have been used to evaluate the distributed capacitances of symmetrical inductors to better predict the resonance frequency. The QVCO is implemented in a 0.25 mum CMOS process from Agere Systems. The total current consumption including the buffer is 5.4 mA at 1.3 V supply, where of the QVCO uses 2.0 mA. The phase noise measures below - 138 dBc/Hz at 3 MHz offset frequency over the 8.9% tuning range 1.715 GHz 1.875 GHz.},
  author       = {Troedsson, Niklas and Sjöland, Henrik},
  issn         = {0925-1030},
  keyword      = {VCO,CMOS,microstrip theory,capacitances,parasitic distributed,quadrature oscillator,inductor modeling,low voltage,on-chip,inductor},
  language     = {eng},
  number       = {1},
  pages        = {7--19},
  publisher    = {Springer},
  series       = {Analog Integrated Circuits and Signal Processing},
  title        = {A distributed capacitance analysis of co-planar inductors for a CMOS QVCO with varactor tuned buffer stage},
  url          = {http://dx.doi.org/10.1007/s10470-004-6843-1},
  volume       = {42},
  year         = {2005},
}