Publications | Lund University Publications

1 – 10 of 42

show: 10
|
sort: year (new to old)

News feed Embed this list Save this search Mark all Export

Cancel

Embed this list

copy and paste the html snippet below into your own page:

<iframe src="https://lup.lub.lu.se/search/publication?embed=1&q=issn+exact+%220925-1030%22&amp;hide_pagination=1&amp;hide_info=1&amp;hide_options=1"
  width="100%"
  height="400"
  allowtransparency="true"
  frameborder="0">
</iframe>

« previous
1
2
3
4
5
next »

2023
Mark An LO phase shifter with frequency tripling and phase detection in 28 nm FD-SOI CMOS for mm-wave 5G transceivers
Gannedahl, Rikard ^LU and Sjöland, Henrik ^LU (2023) In Analog Integrated Circuits and Signal Processing 114(1). p.1-11
- Contribution to journal › Article
2021
Mark An ultra-low power high-precision logarithmic-curvature compensated all-CMOS voltage reference in 65 nm CMOS
Ghanavati Nejad, Tayebeh ; Farshidi, Ebrahim ; Sjöland, Henrik ^LU and Kosarian, Abdolnabi (2021) In Analog Integrated Circuits and Signal Processing 107(2). p.319-330
- Contribution to journal › Article
2019
Mark A high precision logarithmic-curvature compensated all CMOS voltage reference
Ghanavati Nejad, Tayebeh ; Farshidi, Ebrahim ; Sjöland, Henrik ^LU and Kosarian, Abdolnabi (2019) In Analog Integrated Circuits and Signal Processing 99(2). p.383-392
- Contribution to journal › Article
2017
Mark System simulations of a 1.5 V SiGe 81-86 GHz E-band transmitter
TIRED, TOBIAS ^LU ; Sandrup, Per ; Nejdel, Anders ; Wernehag, Johan ^LU and Sjöland, Henrik ^LU (2017) In Analog Integrated Circuits and Signal Processing 90(2). p.333-349
- Contribution to journal › Article
2016
Mark A continuous-time delta-sigma ADC with integrated digital background calibration
Tan, Siyu ^LU ; Miao, Yun ; Palm, Mattias ; Rodrigues, Joachim Neves ^LU and Andreani, Pietro ^LU (2016) In Analog Integrated Circuits and Signal Processing 89(2). p.273-282
- Contribution to journal › Article
Mark A 2.8-to-5.8 GHz harmonic VCO based on an 8-shaped inductor in a 28 nm UTBB FD-SOI CMOS process
Mahmoud, Ahmed ^LU ; Fanori, Luca ; Mattsson, Thomas ; Caputa, Peter and Andreani, Piero ^LU (2016) In Analog Integrated Circuits and Signal Processing 88(3). p.391-399
- Contribution to journal › Article
Mark A wide band fractional-N digital PLL with a noise shaping 2-D time to digital converter for LTE-A applications
Mahmoud, Ahmed ^LU ; Andreani, Pietro ^LU and Lu, Ping ^LU (2016) In Analog Integrated Circuits and Signal Processing 89(2). p.337-345
- Contribution to journal › Article
2015
Mark A low-power 2nd-order CT delta-sigma modulator with an asynchronous SAR quantizer
Radjen, Dejan ^LU ; Anderson, Martin ; Sundstrom, Lars and Andreani, Pietro ^LU (2015) In Analog Integrated Circuits and Signal Processing 84(3). p.409-420
- Contribution to journal › Article
Mark A 28 GHz SiGe PLL for an 81-86 GHz E-band beam steering transmitter plus an I/Q phase imbalance detection and compensation circuit
Tired, Tobias ^LU ; Sjöland, Henrik ^LU ; Sandrup, Per ; Wernehag, Johan ^LU ; ud Din, Imad and Törmänen, Markus ^LU (2015) In Analog Integrated Circuits and Signal Processing 84(3). p.383-398
- Contribution to journal › Article
2014
Mark A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier
Radjen, Dejan ^LU ; Anderson, Martin ; Sundstrom, Lars and Andreani, Pietro ^LU (2014) In Analog Integrated Circuits and Signal Processing 80(3). p.387-397
- Contribution to journal › Article

« previous
1
2
3
4
5
next »

your query:: Remove issn: 0925-1030