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Efficient DSP and Circuit Architectures for Massive MIMO : State of the Art and Future Directions

Van Der Perre, Liesbet LU ; Liu, Liang LU and Larsson, Erik G. LU (2018) In IEEE Transactions on Signal Processing 66(18). p.4717-4736
Abstract

Massive MIMO is a compelling wireless access concept that relies on the use of an excess number of base-station antennas, relative to the number of active terminals. This technology is a main component of 5G New Radio and addresses all important requirements of future wireless standards: a great capacity increase, the support of many simultaneous users, and improvement in energy efficiency. Massive MIMO requires the simultaneous processing of signals from many antenna chains, and computational operations on large matrices. The complexity of the digital processing has been viewed as a fundamental obstacle to the feasibility of Massive MIMO in the past. Recent advances on system-algorithm-hardware co-design have led to extremely... (More)

Massive MIMO is a compelling wireless access concept that relies on the use of an excess number of base-station antennas, relative to the number of active terminals. This technology is a main component of 5G New Radio and addresses all important requirements of future wireless standards: a great capacity increase, the support of many simultaneous users, and improvement in energy efficiency. Massive MIMO requires the simultaneous processing of signals from many antenna chains, and computational operations on large matrices. The complexity of the digital processing has been viewed as a fundamental obstacle to the feasibility of Massive MIMO in the past. Recent advances on system-algorithm-hardware co-design have led to extremely energy-efficient implementations. These exploit opportunities in deeply-scaled silicon technologies and perform partly distributed processing to cope with the bottlenecks encountered in the interconnection of many signals. For example, prototype ASIC implementations have demonstrated zero-forcing precoding in real time at a 55 mW power consumption (20 MHz bandwidth, 128 antennas, and multiplexing of 8 terminals). Coarse and even error-prone digital processing in the antenna paths permits a reduction of consumption with a factor of 2 to 5. This article summarizes the fundamental technical contributions to efficient digital signal processing for Massive MIMO. The opportunities and constraints on operating on low-complexity RF and analog hardware chains are clarified. It illustrates how terminals can benefit from improved energy efficiency. The status of technology and real-life prototypes discussed. Open challenges and directions for future research are suggested.

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Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
Antenna arrays, circuits, MIMO communication
in
IEEE Transactions on Signal Processing
volume
66
issue
18
pages
20 pages
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • scopus:85050393579
ISSN
1053-587X
DOI
10.1109/TSP.2018.2858190
language
English
LU publication?
yes
id
2eabbc8f-3277-48c2-bce1-3a70517bf9fc
date added to LUP
2018-08-28 14:25:34
date last changed
2019-01-06 14:02:50
@article{2eabbc8f-3277-48c2-bce1-3a70517bf9fc,
  abstract     = {<p>Massive MIMO is a compelling wireless access concept that relies on the use of an excess number of base-station antennas, relative to the number of active terminals. This technology is a main component of 5G New Radio and addresses all important requirements of future wireless standards: a great capacity increase, the support of many simultaneous users, and improvement in energy efficiency. Massive MIMO requires the simultaneous processing of signals from many antenna chains, and computational operations on large matrices. The complexity of the digital processing has been viewed as a fundamental obstacle to the feasibility of Massive MIMO in the past. Recent advances on system-algorithm-hardware co-design have led to extremely energy-efficient implementations. These exploit opportunities in deeply-scaled silicon technologies and perform partly distributed processing to cope with the bottlenecks encountered in the interconnection of many signals. For example, prototype ASIC implementations have demonstrated zero-forcing precoding in real time at a 55 mW power consumption (20 MHz bandwidth, 128 antennas, and multiplexing of 8 terminals). Coarse and even error-prone digital processing in the antenna paths permits a reduction of consumption with a factor of 2 to 5. This article summarizes the fundamental technical contributions to efficient digital signal processing for Massive MIMO. The opportunities and constraints on operating on low-complexity RF and analog hardware chains are clarified. It illustrates how terminals can benefit from improved energy efficiency. The status of technology and real-life prototypes discussed. Open challenges and directions for future research are suggested.</p>},
  articleno    = {8416771},
  author       = {Van Der Perre, Liesbet and Liu, Liang and Larsson, Erik G.},
  issn         = {1053-587X},
  keyword      = {Antenna arrays,circuits,MIMO communication},
  language     = {eng},
  month        = {09},
  number       = {18},
  pages        = {4717--4736},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Transactions on Signal Processing},
  title        = {Efficient DSP and Circuit Architectures for Massive MIMO : State of the Art and Future Directions},
  url          = {http://dx.doi.org/10.1109/TSP.2018.2858190},
  volume       = {66},
  year         = {2018},
}