Custom Datapaths for DSP ASICs Methodology and Implementation

Abstract

This thesis regards datapath design and analysis at several abstraction levels. Five papers are presented that focus on datapath design for mobile communication systems and design methodologies for such datapaths.



Paper I discusses different aspects of Turbo channel decoder design for high speed and low power applications. It is shown that critical path delay is significantly reduced by simple rescheduling operations. A new topology is presented for UMTS interleavers that achieves significantly higher throughput with lower power consumption and smaller area.



In paper II, a datapath design methodology based on a fast handshaking protocol is presented. The methodology is implemented with a small set of flexible and lean modules that compared to standard handshaking protocols have both smaller delay and lower implementation cost for pipelined datapath designs.



In paper III software domain abstraction paradigms are applied to the design of a hardware datapath library in C++. Several methodologies in the software domain are shown to aid the design process. Two of the more important are design for interfaces and design with design patterns. It is shown that reliability and usability are improved by the application of software paradigms.



Papers IV and V deal with the design of broadband interpolating and decimating channel filters for low power applications. All filters are of the lattice wave digital filter type, which is suitable for parallelization and has good filtering properties. Several architectural modifications are described to increase the parallelism and achieve lower clock frequency and supply voltage.

• author: Åström, Pontus
• supervisor: [unknown] [unknown]
• opponent: Professor Peng, Zebo, Linköping University
• organization: Department of Electrical and Information Technology
• publishing date: 2003
• type: Thesis
• publication status: published
• subject: Electrical Engineering, Electronic Engineering, Information Engineering
• keywords: Electrical engineering, Elektroteknik, handshake circuits, design patterns, design abstraction, design methodology, UMTS, interleaver architecture, Turbo decoder implementation, low power, Digital filter, wave digital filter
• pages: 169 pages
• defense location: Room E:1406, E-building, Lund Institute of Technology
• defense date: 2003-05-23 13:15:00
• language: English
• LU publication?: yes
• additional info: Article: P. Åström and P.Nilsson, Hardware Architecture forPower Efficient and Portable UMTS Turbo decoder, in Proc.of World Wireless Congress, 3Gwireless'2003, San Francisco, CA,USA, May 27-30 2003, to be published. Article: P. Åström and P. Nilsson, Event Driven DesignMethodology for Hardware DSP Design, in Proc. of 3rdIASTED International Conference on Circuits, Signals, andSystems, CSS 2003. Cancun, Mexico: IASTED, May 19-21 2003. Article: P. Åström, S. Johansson, and P. Nilsson, Applicationof Software Design Patterns to DSP Library Design, inProc. of 14th International Symposium on System Synthesis,ISSS 2001. Montreal, Canada: ACM, Sept. 30-Oct. 3 2001,pp. 239-243. Article: P. Åström, M. Torkelson, and P. Nilsson, Design of aHigh Throughput Serial Concatenated Convolutional Decoder, inProc. of 17th NORCHIP Conference, Oslo, Norway, Nov.8-91999, pp. 304-309. Article: P. Åström, P. Nilsson, and M. Torkelson, PowerReduction in Custom CMOS Digital Filter Structures,Analog Integrated Circuits and Signal Processing, vol. 18,no. 1, pp. 97-105, Jan. 1999. Article: P. Åström, P. Nilsson, and M. Torkelson, DigitalChannel Filters for Wideband Transceivers, in Proc. ofRadioVetenskap och Kommunikation 96 (RVK'96), H. H.Zetterberg, Ed., Lulea, Sweden, June 3-6 1996, pp. 554-558.
• id: 3623dc75-fab4-4fc0-8408-7a6c8f840cca (old id 465826)
• date added to LUP: 2016-04-01 16:01:29
• date last changed: 2018-11-21 20:38:09