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Hardware-Conscious Wireless Communication System Design

Sarajlic, Muris LU (2019)
Abstract
The work at hand is a selection of topics in efficient wireless communication system design, with topics logically divided into two groups.

One group can be described as hardware designs conscious of their possibilities and limitations. In other words, it is about hardware that chooses its configuration and properties depending on the performance that needs to be delivered and the influence of external factors, with the goal of keeping the energy consumption as low as possible. Design parameters that trade off power with complexity are identified for analog, mixed signal and digital circuits, and implications of these tradeoffs are analyzed in detail. An analog front end and an LDPC channel decoder that adapt their parameters to... (More)
The work at hand is a selection of topics in efficient wireless communication system design, with topics logically divided into two groups.

One group can be described as hardware designs conscious of their possibilities and limitations. In other words, it is about hardware that chooses its configuration and properties depending on the performance that needs to be delivered and the influence of external factors, with the goal of keeping the energy consumption as low as possible. Design parameters that trade off power with complexity are identified for analog, mixed signal and digital circuits, and implications of these tradeoffs are analyzed in detail. An analog front end and an LDPC channel decoder that adapt their parameters to the environment (e.g. fluctuating power level due to fading) are proposed, and it is analyzed how much power/energy these environment-adaptive structures save compared to non-adaptive designs made for the worst-case scenario. Additionally, the impact of ADC bit resolution on the energy efficiency of a massive MIMO system is examined in detail, with the goal of finding bit resolutions that maximize the energy efficiency under various system setups.

In another group of themes, one can recognize systems where the system architect was conscious of fundamental limitations stemming from hardware.
Put in another way, in these designs there is no attempt of tweaking or tuning the hardware. On the contrary, system design is performed so as to work around an existing and unchangeable hardware limitation. As a workaround for the problematic centralized topology, a massive MIMO base station based on the daisy chain topology is proposed and a method for signal processing tailored to the daisy chain setup is designed. In another example, a large group of cooperating relays is split into several smaller groups, each cooperatively performing relaying independently of the others. As cooperation consumes resources (such as bandwidth), splitting the system into smaller, independent cooperative parts helps save resources and is again an example of a workaround for an inherent limitation.

From the analyses performed in this thesis, promising observations about hardware consciousness can be made. Adapting the structure of a hardware block to the environment can bring massive savings in energy, and simple workarounds prove to perform almost as good as the inherently limited designs, but with the limitation being successfully bypassed. As a general observation, it can be concluded that hardware consciousness pays off. (Less)
Please use this url to cite or link to this publication:
author
supervisor
opponent
  • Professor Studer, Christoph, Cornell University
organization
publishing date
type
Thesis
publication status
published
subject
keywords
Energy efficiency, communication systems, Signal processing algorithms
pages
220 pages
publisher
Lund University
defense location
Lecture Hall E 1406, E-building, Ole Römers Väg 3, Lund University, Faculty of Engineering, LTH
defense date
2019-02-25 09:15
ISBN
978-91-7753-914-8
978-91-7753-915-5
language
English
LU publication?
yes
id
3fce8643-d300-4433-9086-b34871e6f664
date added to LUP
2019-01-30 09:00:41
date last changed
2019-01-31 13:21:16
@phdthesis{3fce8643-d300-4433-9086-b34871e6f664,
  abstract     = {The work at hand is a selection of topics in efficient wireless communication system design, with topics logically divided into two groups.<br/><br/>One group can be described as hardware designs conscious of their possibilities and limitations. In other words, it is about hardware that chooses its configuration and properties depending on the performance that needs to be delivered and the influence of external factors, with the goal of keeping the energy consumption as low as possible. Design parameters that trade off power with complexity are identified for analog, mixed signal and digital circuits, and implications of these tradeoffs are analyzed in detail. An analog front end and an LDPC channel decoder that adapt their parameters to the environment (e.g. fluctuating power level due to fading) are proposed, and it is analyzed how much power/energy these environment-adaptive structures save compared to non-adaptive designs made for the worst-case scenario. Additionally, the impact of ADC bit resolution on the energy efficiency of a massive MIMO system is examined in detail, with the goal of finding bit resolutions that maximize the energy efficiency under various system setups.<br/><br/>In another group of themes, one can recognize systems where the system architect was conscious of fundamental limitations stemming from hardware.<br/>Put in another way, in these designs there is no attempt of tweaking or tuning the hardware. On the contrary, system design is performed so as to work around an existing and unchangeable hardware limitation. As a workaround for the problematic centralized topology, a massive MIMO base station based on the daisy chain topology is proposed and a method for signal processing tailored to the daisy chain setup is designed. In another example, a large group of cooperating relays is split into several smaller groups, each cooperatively performing relaying independently of the others. As cooperation consumes resources (such as bandwidth), splitting the system into smaller, independent cooperative parts helps save resources and is again an example of a workaround for an inherent limitation.<br/><br/>From the analyses performed in this thesis, promising observations about hardware consciousness can be made. Adapting the structure of a hardware block to the environment can bring massive savings in energy, and simple workarounds prove to perform almost as good as the inherently limited designs, but with the limitation being successfully bypassed. As a general observation, it can be concluded that hardware consciousness pays off.},
  author       = {Sarajlic, Muris},
  isbn         = {978-91-7753-914-8},
  keyword      = {Energy efficiency,communication systems,Signal processing algorithms},
  language     = {eng},
  month        = {01},
  pages        = {220},
  publisher    = {Lund University},
  school       = {Lund University},
  title        = {Hardware-Conscious Wireless Communication System Design},
  year         = {2019},
}