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Algorithm-Architecture Co-Design for Digital Front-Ends in Mobile Receivers

Diaz, Isael LU (2014)
Abstract (Swedish)
Popular Abstract in English

From the pure technological perspective (leaving the business aside), the design of electronic devices, such as mobile phones, is an extremely complex process often involving a large number of disciplines, from mastering complicated mathematical models to proficiency of physical and electrical properties of specific materials involved in the manufacturing. In order to overcome this challenge, abstraction layers are used to separate the various disciplines, so that, a well trained individual can design this complex device from a system perspective. However, as one can expect, when the already complicated disciplines evolve the abstraction layers become more and more complex, thus, it becomes... (More)
Popular Abstract in English

From the pure technological perspective (leaving the business aside), the design of electronic devices, such as mobile phones, is an extremely complex process often involving a large number of disciplines, from mastering complicated mathematical models to proficiency of physical and electrical properties of specific materials involved in the manufacturing. In order to overcome this challenge, abstraction layers are used to separate the various disciplines, so that, a well trained individual can design this complex device from a system perspective. However, as one can expect, when the already complicated disciplines evolve the abstraction layers become more and more complex, thus, it becomes increasingly difficult for a single individual to make the right choices, resulting in sub-optimal implementations.



In the thesis, the author tries to defeat this challenge by removing the boundary between algorithm and hardware architecture. An algorithm, in this case, describes a mathematical model characterizing the procedure for all the mathematical operations that the mobile phone (or parts of it) need to perform in order to arrive to the desired functionality. The hardware architecture describes the phone's physical system, its components and the relation between those components.



In this thesis, the cross-disciplinary optimization is done in three manners: In the first, the optimization is done from architecture side toward the algorithm side. Here, the effects of extreme quantization, an effect typically seen as a hardware-only issue, is modeled in the algorithm development so that with just the right algorithm tinkering, parts of the mobile phone can save up to 80% in energy consumption.

In the second manner, the optimization is done in the opposite direction, from the algorithm side towards the hardware side. Here, the algorithm is set fixed, and a number of hardware architectures are selected for filtering. The correct selection leads to one of the hardware modules to become redundant. Then, by removing this redundant module, the system utilization is increased and the entire architecture becomes more flexible. (Less)
Abstract
The methodology behind this work has been to use the concept of algorithm-hardware co-design to achieve efficient solutions related to the digital front-end in mobile receivers. It has been shown that, by looking at algorithms and hardware architectures together, more efficient solutions can be found; i.e., efficient with respect to some design measure. In this thesis the main focus have been placed on two such parameters; first reduced complexity algorithms to lower energy consumptions at limited performance degradation, secondly to handle the increasing number of wireless standards that preferably should run on the same hardware platform. To be able to perform this task it is crucial to understand both sides of the table, i.e., both... (More)
The methodology behind this work has been to use the concept of algorithm-hardware co-design to achieve efficient solutions related to the digital front-end in mobile receivers. It has been shown that, by looking at algorithms and hardware architectures together, more efficient solutions can be found; i.e., efficient with respect to some design measure. In this thesis the main focus have been placed on two such parameters; first reduced complexity algorithms to lower energy consumptions at limited performance degradation, secondly to handle the increasing number of wireless standards that preferably should run on the same hardware platform. To be able to perform this task it is crucial to understand both sides of the table, i.e., both algorithms and concepts for wireless communication as well as the implications arising on the hardware architecture.



It is easier to handle the high complexity by separating those disciplines in a way of layered abstraction. However, this representation is imperfect, since many interconnected "details" belonging to different layers are lost in the attempt of handling the complexity. This results in poor implementations and the design of mobile terminals is no exception. Wireless communication standards are often designed based on mathematical algorithms with theoretical boundaries, with few considerations to actual implementation constraints such as, energy consumption, silicon area, etc. This thesis does not try to remove the layer abstraction model, given its undeniable advantages, but rather uses those cross-layer "details" that went missing during the abstraction. This is done in three manners:



In the first part, the cross-layer optimization is carried out from the algorithm perspective. Important circuit design parameters, such as quantization are taken into consideration when designing the algorithm for OFDM symbol timing, CFO, and SNR estimation with a single bit, namely, the Sign-Bit. Proof-of-concept circuits were fabricated and showed high potential for low-end receivers. In the second part, the cross-layer optimization is accomplished from the opposite side, i.e., the hardware-architectural side. A SDR architecture is known for its flexibility and scalability over many applications. In this work a filtering application is mapped into software instructions in the SDR architecture in order to make filtering-specific modules redundant, and thus, save silicon area. In the third and last part, the optimization is done from an intermediate point within the algorithm-architecture spectrum. Here, a heterogeneous architecture with a combination of highly efficient and highly flexible modules is used to accomplish initial synchronization in at least two concurrent OFDM standards. A demonstrator was build capable of performing synchronization in any two standards, including LTE, WiFi, and DVB-H. (Less)
Please use this url to cite or link to this publication:
author
supervisor
opponent
  • Assistant Prof. Zhang, Zhengya, University of Michigan, USA.
organization
publishing date
type
Thesis
publication status
published
subject
keywords
Architecture Optimization, Digital Front End, Wireless Communication, Mobile terminal
pages
154 pages
defense location
lecture hall E:1406, E-building, Ole Römers väg 3, Lund University Faculty of Engineering
defense date
2014-04-04 10:15
ISSN
1654-790X
ISBN
978-91-7473-788-2
project
Radiosystem: Multibase (EU, VÖ/OE)
language
English
LU publication?
yes
id
a425aa64-d133-4749-87c9-1155ed3316a4 (old id 4355293)
date added to LUP
2014-03-12 15:08:58
date last changed
2016-09-19 08:45:00
@phdthesis{a425aa64-d133-4749-87c9-1155ed3316a4,
  abstract     = {The methodology behind this work has been to use the concept of algorithm-hardware co-design to achieve efficient solutions related to the digital front-end in mobile receivers. It has been shown that, by looking at algorithms and hardware architectures together, more efficient solutions can be found; i.e., efficient with respect to some design measure. In this thesis the main focus have been placed on two such parameters; first reduced complexity algorithms to lower energy consumptions at limited performance degradation, secondly to handle the increasing number of wireless standards that preferably should run on the same hardware platform. To be able to perform this task it is crucial to understand both sides of the table, i.e., both algorithms and concepts for wireless communication as well as the implications arising on the hardware architecture. <br/><br>
<br/><br>
It is easier to handle the high complexity by separating those disciplines in a way of layered abstraction. However, this representation is imperfect, since many interconnected "details" belonging to different layers are lost in the attempt of handling the complexity. This results in poor implementations and the design of mobile terminals is no exception. Wireless communication standards are often designed based on mathematical algorithms with theoretical boundaries, with few considerations to actual implementation constraints such as, energy consumption, silicon area, etc. This thesis does not try to remove the layer abstraction model, given its undeniable advantages, but rather uses those cross-layer "details" that went missing during the abstraction. This is done in three manners:<br/><br>
<br/><br>
In the first part, the cross-layer optimization is carried out from the algorithm perspective. Important circuit design parameters, such as quantization are taken into consideration when designing the algorithm for OFDM symbol timing, CFO, and SNR estimation with a single bit, namely, the Sign-Bit. Proof-of-concept circuits were fabricated and showed high potential for low-end receivers. In the second part, the cross-layer optimization is accomplished from the opposite side, i.e., the hardware-architectural side. A SDR architecture is known for its flexibility and scalability over many applications. In this work a filtering application is mapped into software instructions in the SDR architecture in order to make filtering-specific modules redundant, and thus, save silicon area. In the third and last part, the optimization is done from an intermediate point within the algorithm-architecture spectrum. Here, a heterogeneous architecture with a combination of highly efficient and highly flexible modules is used to accomplish initial synchronization in at least two concurrent OFDM standards. A demonstrator was build capable of performing synchronization in any two standards, including LTE, WiFi, and DVB-H.},
  author       = {Diaz, Isael},
  isbn         = {978-91-7473-788-2},
  issn         = {1654-790X},
  keyword      = {Architecture Optimization,Digital Front End,Wireless Communication,Mobile terminal},
  language     = {eng},
  pages        = {154},
  school       = {Lund University},
  title        = {Algorithm-Architecture Co-Design for Digital Front-Ends in Mobile Receivers},
  year         = {2014},
}