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A Filtering Delta Sigma ADC for LTE and Beyond

Andersson, Mattias LU ; Andersson, Martin LU ; Sundström, Lars and Andreani, Pietro LU (2014) In IEEE Journal of Solid-State Circuits 49(7). p.1535-1547
Abstract (Swedish)
Abstract in Undetermined

This paper presents a filtering ADC for the LTE communication standard, where a second-order Delta-Sigma modulator (DSM) is incorporated into the third-order Chebychev channel-select filter (CSF) of the radio receiver. The CSF introduces an additional third-order suppression of both thermal and quantization DSM noise, while the CSF transfer function is maintained. A design method for the filtering ADC accounting for unavoidable DSM-DAC delays is developed and experimentally demonstrated. The 65 nm CMOS prototype is clocked at 576/288 MHz with an 18.5/9.0 MHz LTE bandwidth, has an in-band gain of 26 dB, an SNDR of 56.4/58.1 dB, an input-referred noise of 5 nV/root Hz, and an out-of-band (half-duplex)... (More)
Abstract in Undetermined

This paper presents a filtering ADC for the LTE communication standard, where a second-order Delta-Sigma modulator (DSM) is incorporated into the third-order Chebychev channel-select filter (CSF) of the radio receiver. The CSF introduces an additional third-order suppression of both thermal and quantization DSM noise, while the CSF transfer function is maintained. A design method for the filtering ADC accounting for unavoidable DSM-DAC delays is developed and experimentally demonstrated. The 65 nm CMOS prototype is clocked at 576/288 MHz with an 18.5/9.0 MHz LTE bandwidth, has an in-band gain of 26 dB, an SNDR of 56.4/58.1 dB, an input-referred noise of 5 nV/root Hz, and an out-of-band (half-duplex) IIP3 of 20/12 dBV(rms), with a power consumption of 7.9/5.4 mW and an overall state-of-the art performance. (Less)
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author
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
channel-select filter, A/D converter, continuous-time, Delta-Sigma, modulator (DSM), filtering A/D converter, low-pass filter, STF
in
IEEE Journal of Solid-State Circuits
volume
49
issue
7
pages
1535 - 1547
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • wos:000338512700009
  • scopus:84903714749
ISSN
0018-9200
DOI
10.1109/JSSC.2014.2319254
language
English
LU publication?
yes
id
7d8f807a-d2f0-403d-bc51-60b44149e950 (old id 4377960)
date added to LUP
2014-04-01 14:18:43
date last changed
2017-10-22 04:23:50
@article{7d8f807a-d2f0-403d-bc51-60b44149e950,
  abstract     = {<b>Abstract in Undetermined</b><br/><br>
This paper presents a filtering ADC for the LTE communication standard, where a second-order Delta-Sigma modulator (DSM) is incorporated into the third-order Chebychev channel-select filter (CSF) of the radio receiver. The CSF introduces an additional third-order suppression of both thermal and quantization DSM noise, while the CSF transfer function is maintained. A design method for the filtering ADC accounting for unavoidable DSM-DAC delays is developed and experimentally demonstrated. The 65 nm CMOS prototype is clocked at 576/288 MHz with an 18.5/9.0 MHz LTE bandwidth, has an in-band gain of 26 dB, an SNDR of 56.4/58.1 dB, an input-referred noise of 5 nV/root Hz, and an out-of-band (half-duplex) IIP3 of 20/12 dBV(rms), with a power consumption of 7.9/5.4 mW and an overall state-of-the art performance.},
  author       = {Andersson, Mattias and Andersson, Martin and Sundström, Lars and Andreani, Pietro},
  issn         = {0018-9200},
  keyword      = {channel-select filter,A/D converter,continuous-time,Delta-Sigma,modulator (DSM),filtering A/D converter,low-pass filter,STF},
  language     = {eng},
  number       = {7},
  pages        = {1535--1547},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Journal of Solid-State Circuits},
  title        = {A Filtering Delta Sigma ADC for LTE and Beyond},
  url          = {http://dx.doi.org/10.1109/JSSC.2014.2319254},
  volume       = {49},
  year         = {2014},
}