Skip to main content

Lund University Publications

LUND UNIVERSITY LIBRARIES

FLOPSYNC-2: efficient monotonic clock synchronisation

Terraneo, Federico ; Rinaldi, Luigi ; Maggio, Martina LU ; Papadopoulos, Alessandro Vittorio LU and Leva, Alberto (2014) 2014 IEEE Real-Time Systems Symposium (RTSS) p.11-20
Abstract
Time synchronisation is crucial for distributed systems, and particularly for Wireless Sensor Networks (WSNs), where each node is executing concurrent operations to achieve a real-time objective. However, synchronisation is quite difficult to achieve in WSNs, due to the unpredictable deployment conditions and to physical effects like thermal stress, that cause drifts in the local node clocks. As a result, state-of-the-art synchronisation schemes do not guarantee monotonicity of the nodes clock, or are relying on external hardware assistance. In this paper we present FLOPSYNC-2, a scheme to synchronise the clocks of multiple nodes in a WSN, requiring no additional hardware, and based on the application of control-theoretical principles. The... (More)
Time synchronisation is crucial for distributed systems, and particularly for Wireless Sensor Networks (WSNs), where each node is executing concurrent operations to achieve a real-time objective. However, synchronisation is quite difficult to achieve in WSNs, due to the unpredictable deployment conditions and to physical effects like thermal stress, that cause drifts in the local node clocks. As a result, state-of-the-art synchronisation schemes do not guarantee monotonicity of the nodes clock, or are relying on external hardware assistance. In this paper we present FLOPSYNC-2, a scheme to synchronise the clocks of multiple nodes in a WSN, requiring no additional hardware, and based on the application of control-theoretical principles. The scheme guarantees low overhead, low power

consumption and synchronisation with clock monotonicity.



We propose an implementation of FLOPSYNC-2 on top of the microcontroller operating system Miosix, and prove the validity of our claims with several-days-long experiments on an eight-hop network. The experimental results show that the average clock difference among nodes is limited to a hundred of ns, with a sub-μs standard deviation. By introducing a suitable power model, we also prove that synchronisation is achieved with a sub-μA consumption overhead. (Less)
Please use this url to cite or link to this publication:
author
; ; ; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
Synchronisation, Wireless Sensor Network
host publication
[Host publication title missing]
pages
11 - 20
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
2014 IEEE Real-Time Systems Symposium (RTSS)
conference dates
2014-12-02
external identifiers
  • scopus:84936947823
ISSN
1052-8725
ISBN
978-1-4799-7288-3
DOI
10.1109/RTSS.2014.14
language
English
LU publication?
yes
id
c5409c7e-61a0-44e0-99f8-0e13bf2edc43 (old id 4690248)
date added to LUP
2016-04-01 14:31:54
date last changed
2021-10-06 05:06:35
@inproceedings{c5409c7e-61a0-44e0-99f8-0e13bf2edc43,
  abstract     = {Time synchronisation is crucial for distributed systems, and particularly for Wireless Sensor Networks (WSNs), where each node is executing concurrent operations to achieve a real-time objective. However, synchronisation is quite difficult to achieve in WSNs, due to the unpredictable deployment conditions and to physical effects like thermal stress, that cause drifts in the local node clocks. As a result, state-of-the-art synchronisation schemes do not guarantee monotonicity of the nodes clock, or are relying on external hardware assistance. In this paper we present FLOPSYNC-2, a scheme to synchronise the clocks of multiple nodes in a WSN, requiring no additional hardware, and based on the application of control-theoretical principles. The scheme guarantees low overhead, low power<br/><br>
consumption and synchronisation with clock monotonicity.<br/><br>
<br/><br>
We propose an implementation of FLOPSYNC-2 on top of the microcontroller operating system Miosix, and prove the validity of our claims with several-days-long experiments on an eight-hop network. The experimental results show that the average clock difference among nodes is limited to a hundred of ns, with a sub-μs standard deviation. By introducing a suitable power model, we also prove that synchronisation is achieved with a sub-μA consumption overhead.},
  author       = {Terraneo, Federico and Rinaldi, Luigi and Maggio, Martina and Papadopoulos, Alessandro Vittorio and Leva, Alberto},
  booktitle    = {[Host publication title missing]},
  isbn         = {978-1-4799-7288-3},
  issn         = {1052-8725},
  language     = {eng},
  pages        = {11--20},
  publisher    = {IEEE - Institute of Electrical and Electronics Engineers Inc.},
  title        = {FLOPSYNC-2: efficient monotonic clock synchronisation},
  url          = {https://lup.lub.lu.se/search/files/4027093/4690249.pdf},
  doi          = {10.1109/RTSS.2014.14},
  year         = {2014},
}