InAs nanowire MOSFETs in three-transistor configurations: single balanced RF down-conversion mixers.
(2014) In Nanotechnology 25(48).- Abstract
- Integration of III-V semiconductors on Si substrates allows for the realization of high-performance, low power III-V electronics on the Si-platform. In this work, we demonstrate the implementation of single balanced down-conversion mixer circuits, fabricated using vertically aligned InAs nanowire devices on Si. A thin, highly doped InAs buffer layer has been introduced to reduce the access resistance and serve as a bottom electrode. Low-frequency voltage conversion gain is measured up to 7 dB for a supply voltage of 1.5V. Operation of these mixers extends into the GHz regime with a [Formula: see text] cut-off frequency of 2 GHz, limited by the optical lithography system used. The circuit dc power consumption is measured at 3.9 mW.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/4817084
- author
- Berg, Martin
LU
; Persson, Karl-Magnus
LU
; Wu, Jun
LU
; Lind, Erik
LU
; Sjöland, Henrik LU
and Wernersson, Lars-Erik LU
- organization
- publishing date
- 2014
- type
- Contribution to journal
- publication status
- published
- subject
- in
- Nanotechnology
- volume
- 25
- issue
- 48
- article number
- 485203
- publisher
- IOP Publishing
- external identifiers
-
- pmid:25382271
- wos:000345286400008
- scopus:84911072527
- pmid:25382271
- ISSN
- 0957-4484
- DOI
- 10.1088/0957-4484/25/48/485203
- language
- English
- LU publication?
- yes
- id
- ebc70878-aff2-4504-8d89-5ee777ae1b4a (old id 4817084)
- date added to LUP
- 2016-04-01 10:35:02
- date last changed
- 2024-04-21 15:54:41
@article{ebc70878-aff2-4504-8d89-5ee777ae1b4a, abstract = {{Integration of III-V semiconductors on Si substrates allows for the realization of high-performance, low power III-V electronics on the Si-platform. In this work, we demonstrate the implementation of single balanced down-conversion mixer circuits, fabricated using vertically aligned InAs nanowire devices on Si. A thin, highly doped InAs buffer layer has been introduced to reduce the access resistance and serve as a bottom electrode. Low-frequency voltage conversion gain is measured up to 7 dB for a supply voltage of 1.5V. Operation of these mixers extends into the GHz regime with a [Formula: see text] cut-off frequency of 2 GHz, limited by the optical lithography system used. The circuit dc power consumption is measured at 3.9 mW.}}, author = {{Berg, Martin and Persson, Karl-Magnus and Wu, Jun and Lind, Erik and Sjöland, Henrik and Wernersson, Lars-Erik}}, issn = {{0957-4484}}, language = {{eng}}, number = {{48}}, publisher = {{IOP Publishing}}, series = {{Nanotechnology}}, title = {{InAs nanowire MOSFETs in three-transistor configurations: single balanced RF down-conversion mixers.}}, url = {{http://dx.doi.org/10.1088/0957-4484/25/48/485203}}, doi = {{10.1088/0957-4484/25/48/485203}}, volume = {{25}}, year = {{2014}}, }