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RF Characterization of Vertical InAs Nanowire MOSFETs with f(t) and f(max) above 140 GHz

Johansson, Sofia LU ; Memisevic, Elvedin LU ; Wernersson, Lars-Erik LU and Lind, Erik LU (2014) 26th International Conference on Indium Phosphide and Related Materials (IPRM)
Abstract
We present RF characterization of vertical gateall- around InAs nanowire MOSFETs integrated on Si substrates with peak f(t) = 142 GHz and f(max) = 155 GHz, representing the record for vertical nanowire transistors. The devices has an L-g approximate to 150 nm with a g(m)=700 mS/mm for a nanowire diameter of 38 nm and an EOT = 1.4 nm. The high values of f(t) is achieved through electron beam lithography patterning of the gate and drain contact which substantially decreases the parasitic capacitances through reduction of the overlay capacitance, which is in good agreement with TCAD modeling.
Please use this url to cite or link to this publication:
author
; ; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
host publication
26th International Conference on Indium Phosphideand Related Materials (IPRM)
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
26th International Conference on Indium Phosphide and Related Materials (IPRM)
conference dates
2014-05-11 - 2014-05-15
external identifiers
  • wos:000346124000055
ISSN
1092-8669
language
English
LU publication?
yes
id
bf1aef29-5582-49c2-90aa-336cbaedbd8d (old id 4962487)
date added to LUP
2016-04-01 14:05:08
date last changed
2018-11-22 16:29:18
@inproceedings{bf1aef29-5582-49c2-90aa-336cbaedbd8d,
  abstract     = {We present RF characterization of vertical gateall- around InAs nanowire MOSFETs integrated on Si substrates with peak f(t) = 142 GHz and f(max) = 155 GHz, representing the record for vertical nanowire transistors. The devices has an L-g approximate to 150 nm with a g(m)=700 mS/mm for a nanowire diameter of 38 nm and an EOT = 1.4 nm. The high values of f(t) is achieved through electron beam lithography patterning of the gate and drain contact which substantially decreases the parasitic capacitances through reduction of the overlay capacitance, which is in good agreement with TCAD modeling.},
  author       = {Johansson, Sofia and Memisevic, Elvedin and Wernersson, Lars-Erik and Lind, Erik},
  booktitle    = {26th International Conference on Indium Phosphideand Related Materials (IPRM)},
  issn         = {1092-8669},
  language     = {eng},
  publisher    = {IEEE - Institute of Electrical and Electronics Engineers Inc.},
  title        = {RF Characterization of Vertical InAs Nanowire MOSFETs with f(t) and f(max) above 140 GHz},
  year         = {2014},
}