3.6 A 60pJ/b 300Mb/s 128×8 Massive MIMO precoder-detector in 28nm FD-SOI
(2017) 64th IEEE International Solid-State Circuits Conference, ISSCC 2017 60. p.60-61- Abstract
Further exploitation of the spatial domain, as in Massive MIMO (MaMi) systems, is imperative to meet future communication requirements [1]. Up-scaling of conventional 4×4 small-scale MIMO implementations to MaMi is prohibitive in-terms of flexibility, as well as area and power cost. This work discloses a 1.1mm2 128×8 MaMi baseband chip, achieving up to 12dB array and 2× spatial multiplexing gains. The area cost compared to previous state-of-the-art MIMO implementations [2-3], is reduced by 53% and 17% for up- and down-link, respectively. Algorithm optimizations and a highly flexible framework were evaluated on real measured channels. Extensive hardware time multiplexing lowered area cost, and leveraging on flexible FD-SOI... (More)
Further exploitation of the spatial domain, as in Massive MIMO (MaMi) systems, is imperative to meet future communication requirements [1]. Up-scaling of conventional 4×4 small-scale MIMO implementations to MaMi is prohibitive in-terms of flexibility, as well as area and power cost. This work discloses a 1.1mm2 128×8 MaMi baseband chip, achieving up to 12dB array and 2× spatial multiplexing gains. The area cost compared to previous state-of-the-art MIMO implementations [2-3], is reduced by 53% and 17% for up- and down-link, respectively. Algorithm optimizations and a highly flexible framework were evaluated on real measured channels. Extensive hardware time multiplexing lowered area cost, and leveraging on flexible FD-SOI body bias and clock gating resulted in an energy efficiency of 6.56nJ/QRD and 60pJ/b at 300Mb/s detection rate.
(Less)
- author
- Prabhu, Hemanth
LU
; Rodrigues, Joachim
LU
; Liu, Liang
LU
and Edfors, Ove LU
- organization
- publishing date
- 2017
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- Massive MIMO, ASIC implementation
- host publication
- 2017 IEEE International Solid-State Circuits Conference (ISSCC)
- volume
- 60
- article number
- 7870260
- pages
- 2 pages
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- 64th IEEE International Solid-State Circuits Conference, ISSCC 2017
- conference location
- San Francisco, United States
- conference dates
- 2017-02-05 - 2017-02-09
- external identifiers
-
- scopus:85016247022
- ISBN
- 978-1-5090-3758-2
- 978-1-5090-3759-9
- DOI
- 10.1109/ISSCC.2017.7870260
- language
- English
- LU publication?
- yes
- id
- 5c811b1d-bfe4-4d50-904c-266a9b23d5a4
- date added to LUP
- 2017-01-09 10:25:24
- date last changed
- 2025-02-09 23:46:42
@inproceedings{5c811b1d-bfe4-4d50-904c-266a9b23d5a4, abstract = {{<p>Further exploitation of the spatial domain, as in Massive MIMO (MaMi) systems, is imperative to meet future communication requirements [1]. Up-scaling of conventional 4×4 small-scale MIMO implementations to MaMi is prohibitive in-terms of flexibility, as well as area and power cost. This work discloses a 1.1mm<sup>2</sup> 128×8 MaMi baseband chip, achieving up to 12dB array and 2× spatial multiplexing gains. The area cost compared to previous state-of-the-art MIMO implementations [2-3], is reduced by 53% and 17% for up- and down-link, respectively. Algorithm optimizations and a highly flexible framework were evaluated on real measured channels. Extensive hardware time multiplexing lowered area cost, and leveraging on flexible FD-SOI body bias and clock gating resulted in an energy efficiency of 6.56nJ/QRD and 60pJ/b at 300Mb/s detection rate.</p>}}, author = {{Prabhu, Hemanth and Rodrigues, Joachim and Liu, Liang and Edfors, Ove}}, booktitle = {{2017 IEEE International Solid-State Circuits Conference (ISSCC)}}, isbn = {{978-1-5090-3758-2}}, keywords = {{Massive MIMO; ASIC implementation}}, language = {{eng}}, pages = {{60--61}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{3.6 A 60pJ/b 300Mb/s 128×8 Massive MIMO precoder-detector in 28nm FD-SOI}}, url = {{http://dx.doi.org/10.1109/ISSCC.2017.7870260}}, doi = {{10.1109/ISSCC.2017.7870260}}, volume = {{60}}, year = {{2017}}, }