A 90 nm CMOS 10 GHz beam forming transmitter
(2005) ISSCS 2005. International Symposium on Signals, Circuits and Systems p.375-378- Abstract
- A 10 GHz beam forming transmitter was designed in a 90 nm CMOS process. Two power amplifiers with independently controllable phase enable the beam forming. The controllable phase is accomplished by switching in binary weighted transistors fed by quadrature signals, which are generated by a quadrature voltage controlled oscillator followed by a buffer. The design contains seven differential on-chip inductors, and consumes a total of 44.0 mA from a 1.2 V supply. The desired output power of 5 dBm per power amplifier is delivered at a power added efficiency of 22 % for the power amplifier
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/615327
- author
- Wernehag, Johan LU and Sjöland, Henrik LU
- organization
- publishing date
- 2005
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- beam forming transmitter, CMOS process, power added efficiency, 44.0 mA, 90 nm, 10 GHz, quadrature signal, 1.2 V, on-chip inductor, quadrature voltage controlled oscillator, controllable phase, buffer, binary weighted transistor, power amplifier
- host publication
- ISSCS 2005. International Symposium on Signals, Circuits and Systems
- pages
- 4 pages
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- ISSCS 2005. International Symposium on Signals, Circuits and Systems
- conference location
- Iasi, Romania
- conference dates
- 2005-07-14 - 2005-07-15
- external identifiers
-
- wos:000231532900094
- scopus:33749067767
- ISBN
- 0-7803-9029-6
- DOI
- 10.1109/ISSCS.2005.1509934
- language
- English
- LU publication?
- yes
- id
- 78639c6e-299a-47c1-b848-447fbe317251 (old id 615327)
- date added to LUP
- 2016-04-04 12:16:45
- date last changed
- 2024-01-13 04:19:56
@inproceedings{78639c6e-299a-47c1-b848-447fbe317251, abstract = {{A 10 GHz beam forming transmitter was designed in a 90 nm CMOS process. Two power amplifiers with independently controllable phase enable the beam forming. The controllable phase is accomplished by switching in binary weighted transistors fed by quadrature signals, which are generated by a quadrature voltage controlled oscillator followed by a buffer. The design contains seven differential on-chip inductors, and consumes a total of 44.0 mA from a 1.2 V supply. The desired output power of 5 dBm per power amplifier is delivered at a power added efficiency of 22 % for the power amplifier}}, author = {{Wernehag, Johan and Sjöland, Henrik}}, booktitle = {{ISSCS 2005. International Symposium on Signals, Circuits and Systems}}, isbn = {{0-7803-9029-6}}, keywords = {{beam forming transmitter; CMOS process; power added efficiency; 44.0 mA; 90 nm; 10 GHz; quadrature signal; 1.2 V; on-chip inductor; quadrature voltage controlled oscillator; controllable phase; buffer; binary weighted transistor; power amplifier}}, language = {{eng}}, pages = {{375--378}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{A 90 nm CMOS 10 GHz beam forming transmitter}}, url = {{https://lup.lub.lu.se/search/files/5968853/1038457.pdf}}, doi = {{10.1109/ISSCS.2005.1509934}}, year = {{2005}}, }