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A 2.4 GHz CMOS power amplifier using internal frequency doubling

Cijvat, Pieternella LU ; Troedsson, Niklas LU and Sjöland, Henrik LU (2005) IEEE International Symposium on Circuits and Systems (ISCAS), 2005 In 2005 IEEE International Symposium On Circuits And Systems (Iscas), Vols 1-6, Conference Proceedings p.2683-2686
Abstract
A fully integrated 0.18 μm 1P6M CMOS power amplifier using internal frequency doubling is presented. Two chips were measured, one stand-alone PA and one PA with a VCO on the same chip. Since the PA and VCO operate at different frequencies, this configuration is suitable for direct-upconversion or low-IF upconversion since oscillator pulling is reduced. The maximum output power is 15 dBm, and the maximum drain efficiency is 10.7% at an output operating frequency of 2.4 GHz
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
output power, drain efficiency, CMOS power amplifier, oscillator pulling, VCO, low-IF upconversion, direct-upconversion, internal frequency doubling, 2.4 GHz, 0.18 micron
in
2005 IEEE International Symposium On Circuits And Systems (Iscas), Vols 1-6, Conference Proceedings
pages
2683 - 2686
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
conference name
IEEE International Symposium on Circuits and Systems (ISCAS), 2005
external identifiers
  • WOS:000232002402194
  • Scopus:47349107946
ISBN
0-7803-8834-8
DOI
10.1109/ISCAS.2005.1465179
language
English
LU publication?
yes
id
6cb2ede6-aab5-462f-820c-b4666b003c9f (old id 615376)
date added to LUP
2007-11-25 09:37:09
date last changed
2017-01-01 08:07:17
@inproceedings{6cb2ede6-aab5-462f-820c-b4666b003c9f,
  abstract     = {A fully integrated 0.18 μm 1P6M CMOS power amplifier using internal frequency doubling is presented. Two chips were measured, one stand-alone PA and one PA with a VCO on the same chip. Since the PA and VCO operate at different frequencies, this configuration is suitable for direct-upconversion or low-IF upconversion since oscillator pulling is reduced. The maximum output power is 15 dBm, and the maximum drain efficiency is 10.7% at an output operating frequency of 2.4 GHz},
  author       = {Cijvat, Pieternella and Troedsson, Niklas and Sjöland, Henrik},
  booktitle    = {2005 IEEE International Symposium On Circuits And Systems (Iscas), Vols 1-6, Conference Proceedings},
  isbn         = {0-7803-8834-8},
  keyword      = {output power,drain efficiency,CMOS power amplifier,oscillator pulling,VCO,low-IF upconversion,direct-upconversion,internal frequency doubling,2.4 GHz,0.18 micron},
  language     = {eng},
  pages        = {2683--2686},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  title        = {A 2.4 GHz CMOS power amplifier using internal frequency doubling},
  url          = {http://dx.doi.org/10.1109/ISCAS.2005.1465179},
  year         = {2005},
}