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Silent CMOS circuits aiming for system-on-chip

Yuan, Jiren LU (2005) 2005 6th International Conference on ASIC Proceedings In 2005 6th International Conference on ASIC Proceedings 1. p.278-281
Abstract
A silent CMOS circuit architecture is proposed. Different silent CMOS gate solutions are presented and compared to the normal CMOS precharged gate in switching noise level. A silent 16-bit parallel carry-look-ahead adder is demonstrated. Simulation results on the circuits and the post layout of the adder are given, which shows a 10 times reduction in noise level is possible
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
16 bit, parallel carry look ahead adder, switching noise, system-on-chip, silent CMOS circuit architecture, noise level reduction
in
2005 6th International Conference on ASIC Proceedings
volume
1
pages
278 - 281
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
conference name
2005 6th International Conference on ASIC Proceedings
external identifiers
  • WOS:000235304100071
  • Scopus:33847359705
ISBN
0780392108
0-7803-9210-8
DOI
10.1109/ICASIC.2005.1611304
language
English
LU publication?
yes
id
32026720-c635-4631-b368-f0e0c8b035d4 (old id 616631)
date added to LUP
2007-11-25 12:31:32
date last changed
2017-01-01 08:01:59
@inproceedings{32026720-c635-4631-b368-f0e0c8b035d4,
  abstract     = {A silent CMOS circuit architecture is proposed. Different silent CMOS gate solutions are presented and compared to the normal CMOS precharged gate in switching noise level. A silent 16-bit parallel carry-look-ahead adder is demonstrated. Simulation results on the circuits and the post layout of the adder are given, which shows a 10 times reduction in noise level is possible},
  author       = {Yuan, Jiren},
  booktitle    = {2005 6th International Conference on ASIC Proceedings},
  isbn         = {0780392108},
  keyword      = {16 bit,parallel carry look ahead adder,switching noise,system-on-chip,silent CMOS circuit architecture,noise level reduction},
  language     = {eng},
  pages        = {278--281},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  title        = {Silent CMOS circuits aiming for system-on-chip},
  url          = {http://dx.doi.org/10.1109/ICASIC.2005.1611304},
  volume       = {1},
  year         = {2005},
}