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Survivor path processing in Viterbi decoders using register exchange and traceforward

Kamuf, Matthias LU ; Öwall, Viktor LU and Anderson, John B LU (2007) In IEEE Transactions on Circuits and Systems - II - Express Briefs 54(6). p.537-541
Abstract
This paper proposes a new class of hybrid VLSI

architectures for survivor path processing to be used in Viterbi decoders. The architecture combines the benefits of register exchange and trace-forward algorithms, that is, low memory requirement and latency versus implementation efficiency. Based on a structural comparison, it becomes evident that the architecture

can be efficiently applied to codes with a larger number

of states where usually trace-back-based architectures, which increase latency, are dominant.
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
(TB), traceback, survivor path, convolutional codes, register exchange (RE), traceforward (TF), Viterbi decoder, VLSI
in
IEEE Transactions on Circuits and Systems - II - Express Briefs
volume
54
issue
6
pages
537 - 541
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • wos:000247445900015
  • scopus:34347369524
ISSN
1558-3791
DOI
10.1109/TCSII.2007.891753
project
Digital ASIC: Flexible Coding and Decoding for Wireless Personal Area Networks
language
English
LU publication?
yes
id
0ba709a1-58c2-4fd0-95e2-ea1bfb675451 (old id 648096)
date added to LUP
2007-11-22 13:24:44
date last changed
2017-01-01 04:34:13
@article{0ba709a1-58c2-4fd0-95e2-ea1bfb675451,
  abstract     = {This paper proposes a new class of hybrid VLSI<br/><br>
architectures for survivor path processing to be used in Viterbi decoders. The architecture combines the benefits of register exchange and trace-forward algorithms, that is, low memory requirement and latency versus implementation efficiency. Based on a structural comparison, it becomes evident that the architecture<br/><br>
can be efficiently applied to codes with a larger number<br/><br>
of states where usually trace-back-based architectures, which increase latency, are dominant.},
  author       = {Kamuf, Matthias and Öwall, Viktor and Anderson, John B},
  issn         = {1558-3791},
  keyword      = {(TB),traceback,survivor path,convolutional codes,register exchange (RE),traceforward (TF),Viterbi decoder,VLSI},
  language     = {eng},
  number       = {6},
  pages        = {537--541},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Transactions on Circuits and Systems - II - Express Briefs},
  title        = {Survivor path processing in Viterbi decoders using register exchange and traceforward},
  url          = {http://dx.doi.org/10.1109/TCSII.2007.891753},
  volume       = {54},
  year         = {2007},
}