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- 2018
-
Mark
The Harmonized Parabolic Synthesis Methodology for Hardware Efficient Function Generation with Full Error Control
(
- Contribution to journal › Article
- 2016
-
Mark
Combining the parabolic synthesis methodology with second-degree interpolation
(
- Contribution to journal › Article
- 2012
-
Mark
Hardware Architectures for Wireless Communication - Symbol Detection and Channel Estimation
2012)(
- Thesis › Doctoral thesis (compilation)
- 2011
-
Mark
Energy-minimum sub-threshold self-timed circuits using current sensing completion detection
2011) 16th IEEE International Symposium on Asynchronous Circuits and Systems In IET Computers and Digital Techniques 5(4). p.342-353(
- Contribution to journal › Article
- 2009
-
Mark
Sign-Bit based architecture for OFDM acquisition for multiple-standards
2009) Norchip Conference, 2009(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2007
-
Mark
Trellis Decoding: From Algorithm to Flexible Architectures
2007) In Series of licentiate and doctoral theses(
- Thesis › Doctoral thesis (monograph)
-
Mark
Survivor path processing in Viterbi decoders using register exchange and traceforward
(
- Contribution to journal › Article
-
Mark
Field Programmable Gate Arrays and Reconfigurable Computing in Automatic Control
2007)(
- Thesis › Licentiate thesis
- 2006
-
Mark
A VLSI architecture of the square root algorithm for V-BLAST detection
(
- Contribution to journal › Article
- 2005
-
Mark
VLSI architecture of the soft-output sphere decoder for MIMO systems
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding