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- 2013
-
Mark
A 65-nm CMOS Area Optimized De-synchronization Flow for sub-V-T Designs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2012
-
Mark
IR-Drop Reduction in Sub-VT Circuits by De-synchronization
2012) IEEE Subthreshold Microelectronics Conference, IEEE-Sub-Vt 2012(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2011
-
Mark
Energy-minimum sub-threshold self-timed circuits using current sensing completion detection
2011) 16th IEEE International Symposium on Asynchronous Circuits and Systems In IET Computers and Digital Techniques 5(4). p.342-353(
- Contribution to journal › Article
- 2010
-
Mark
Minimum-energy sub-threshold self-timed circuits: design methodology and a case study
2010) The 16th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding