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An 8-Bit, 100-MHz low glitch interpolation DAC

Yijun, Zhou LU and Yuan, Jiren LU (2001) IEEE International Symposium on Circuits and Systems, ISCAS, 2001 4. p.116-119
Abstract
This paper describes an 8-Bit, 100-MHz current steering CMOS low glitch interpolation digital to analog converter (DAC). It includes a 16-tap voltage controlled delay line and 8-Bit based linear interpolators, making the effective clock rate up to 1.6-GHz. With the linear interpolation, the requirement on the analog reconstruction filter is relaxed, and low glitch digital to analog conversion is achieved. The chip is fabricated with a 3.3 V, 0.35 μm digital CMOS process
Please use this url to cite or link to this publication:
author
and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
host publication
Proceedings of the 2001 IEEE International Symposium on Circuits and Systems
volume
4
pages
116 - 119
conference name
IEEE International Symposium on Circuits and Systems, ISCAS, 2001
conference location
Sydney, NSW, Australia
conference dates
2001-05-06 - 2001-05-09
external identifiers
  • scopus:40749112288
ISBN
0-7803-6685-9
DOI
10.1109/ISCAS.2001.922184
language
English
LU publication?
yes
id
792d0d26-77f0-42b4-8c7a-f3ad4ad6b640 (old id 1761978)
date added to LUP
2016-04-04 14:12:49
date last changed
2025-04-04 15:17:39
@inproceedings{792d0d26-77f0-42b4-8c7a-f3ad4ad6b640,
  abstract     = {{This paper describes an 8-Bit, 100-MHz current steering CMOS low glitch interpolation digital to analog converter (DAC). It includes a 16-tap voltage controlled delay line and 8-Bit based linear interpolators, making the effective clock rate up to 1.6-GHz. With the linear interpolation, the requirement on the analog reconstruction filter is relaxed, and low glitch digital to analog conversion is achieved. The chip is fabricated with a 3.3 V, 0.35 μm digital CMOS process}},
  author       = {{Yijun, Zhou and Yuan, Jiren}},
  booktitle    = {{Proceedings of the 2001 IEEE International Symposium on Circuits and Systems}},
  isbn         = {{0-7803-6685-9}},
  language     = {{eng}},
  pages        = {{116--119}},
  title        = {{An 8-Bit, 100-MHz low glitch interpolation DAC}},
  url          = {{http://dx.doi.org/10.1109/ISCAS.2001.922184}},
  doi          = {{10.1109/ISCAS.2001.922184}},
  volume       = {{4}},
  year         = {{2001}},
}