Low Power Unrolled CORDIC Architectures
(2015) NORSIG 2015- Abstract
- This paper shows a novel methodology to improve unrolled CORDIC architectures. The methodology is based on removing adder stages starting from the first stage. As an example, a 19-stage CORDIC is used but the methodology is applicable on CORDICs with an arbitrary number of stages. The CORDIC is implemented, simulated, and synthesized into hardware. In the paper, the performance is shown to be increased by 23% and that the dynamic power can be reduced by 27%.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/8164405
- author
- Nilsson, Peter LU ; Sun, Yuhang ; Gangarajaiah, Rakesh LU and Hertz, Erik LU
- organization
- publishing date
- 2015
- type
- Contribution to conference
- publication status
- published
- subject
- pages
- 4 pages
- conference name
- NORSIG 2015
- conference dates
- 2015-10-26
- external identifiers
-
- scopus:84963742027
- DOI
- 10.1109/NORCHIP.2015.7364396
- language
- English
- LU publication?
- yes
- id
- 27799af6-4de5-4e6c-a13c-c283238501fc (old id 8164405)
- date added to LUP
- 2016-04-04 14:17:42
- date last changed
- 2022-01-30 01:44:57
@misc{27799af6-4de5-4e6c-a13c-c283238501fc, abstract = {{This paper shows a novel methodology to improve unrolled CORDIC architectures. The methodology is based on removing adder stages starting from the first stage. As an example, a 19-stage CORDIC is used but the methodology is applicable on CORDICs with an arbitrary number of stages. The CORDIC is implemented, simulated, and synthesized into hardware. In the paper, the performance is shown to be increased by 23% and that the dynamic power can be reduced by 27%.}}, author = {{Nilsson, Peter and Sun, Yuhang and Gangarajaiah, Rakesh and Hertz, Erik}}, language = {{eng}}, title = {{Low Power Unrolled CORDIC Architectures}}, url = {{http://dx.doi.org/10.1109/NORCHIP.2015.7364396}}, doi = {{10.1109/NORCHIP.2015.7364396}}, year = {{2015}}, }