Spatially Coupled Serially Concatenated Codes: Performance Evaluation and VLSI Design Tradeoffs
(2022) In IEEE Transactions on Circuits and Systems I: Regular Papers 69(5). p.1962-1975- Abstract
- Spatially coupled serially concatenated codes (SC-SCCs) are constructed by coupling several classical turbo-like component codes. The resulting spatially coupled codes provide a close-to-capacity performance and low error floor,
which have attracted a lot of interest in the past few years. The aim of this paper is to perform a comprehensive design space exploration to reveal different aspects of SC-SCCs, which is missing in the literature. More specifically, we investigate the effect of block length, coupling memory, decoding window size, and number of iterations on the decoding performance, complexity, latency, and throughput of SC-SCCs. To this end, we propose two decoding algorithms for the SC-SCCs: block-wise and window-wise... (More) - Spatially coupled serially concatenated codes (SC-SCCs) are constructed by coupling several classical turbo-like component codes. The resulting spatially coupled codes provide a close-to-capacity performance and low error floor,
which have attracted a lot of interest in the past few years. The aim of this paper is to perform a comprehensive design space exploration to reveal different aspects of SC-SCCs, which is missing in the literature. More specifically, we investigate the effect of block length, coupling memory, decoding window size, and number of iterations on the decoding performance, complexity, latency, and throughput of SC-SCCs. To this end, we propose two decoding algorithms for the SC-SCCs: block-wise and window-wise decoders. For these, we present VLSI architectural templates and explore them based on building blocks implemented in 12 nm FinFET technology. Linking architectural templates with the new algorithms, we demonstrate various tradeoffs between throughput, silicon area, latency, and decoding performance. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/83b225c5-1ee2-4e1f-a931-8501a3df32d7
- author
- Mahdavi, Mojtaba LU ; Weithoffer, Stefan ; Herrmann, Matthias ; Liu, Liang LU ; Edfors, Ove LU ; Wehn, Norbert and Lentmaier, Michael LU
- organization
- publishing date
- 2022-01-17
- type
- Contribution to journal
- publication status
- published
- subject
- keywords
- Spatial coupling, spatially coupled turbo-like codes, window decoding, coupling memory, VLSI Implementation, decoder architecture, 5G New Radio, FinFET Technology, Digital Baseband Processing, serially concatenated codes, channel coding, forward error correction
- in
- IEEE Transactions on Circuits and Systems I: Regular Papers
- volume
- 69
- issue
- 5
- pages
- 14 pages
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- external identifiers
-
- scopus:85129547250
- ISSN
- 1549-8328
- DOI
- 10.1109/TCSI.2022.3149718
- language
- English
- LU publication?
- yes
- id
- 83b225c5-1ee2-4e1f-a931-8501a3df32d7
- date added to LUP
- 2021-08-31 07:41:28
- date last changed
- 2024-03-21 04:37:10
@article{83b225c5-1ee2-4e1f-a931-8501a3df32d7, abstract = {{Spatially coupled serially concatenated codes (SC-SCCs) are constructed by coupling several classical turbo-like component codes. The resulting spatially coupled codes provide a close-to-capacity performance and low error floor,<br/>which have attracted a lot of interest in the past few years. The aim of this paper is to perform a comprehensive design space exploration to reveal different aspects of SC-SCCs, which is missing in the literature. More specifically, we investigate the effect of block length, coupling memory, decoding window size, and number of iterations on the decoding performance, complexity, latency, and throughput of SC-SCCs. To this end, we propose two decoding algorithms for the SC-SCCs: block-wise and window-wise decoders. For these, we present VLSI architectural templates and explore them based on building blocks implemented in 12 nm FinFET technology. Linking architectural templates with the new algorithms, we demonstrate various tradeoffs between throughput, silicon area, latency, and decoding performance.}}, author = {{Mahdavi, Mojtaba and Weithoffer, Stefan and Herrmann, Matthias and Liu, Liang and Edfors, Ove and Wehn, Norbert and Lentmaier, Michael}}, issn = {{1549-8328}}, keywords = {{Spatial coupling; spatially coupled turbo-like codes; window decoding; coupling memory; VLSI Implementation; decoder architecture; 5G New Radio; FinFET Technology; Digital Baseband Processing; serially concatenated codes; channel coding; forward error correction}}, language = {{eng}}, month = {{01}}, number = {{5}}, pages = {{1962--1975}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, series = {{IEEE Transactions on Circuits and Systems I: Regular Papers}}, title = {{Spatially Coupled Serially Concatenated Codes: Performance Evaluation and VLSI Design Tradeoffs}}, url = {{http://dx.doi.org/10.1109/TCSI.2022.3149718}}, doi = {{10.1109/TCSI.2022.3149718}}, volume = {{69}}, year = {{2022}}, }