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Two Countermeasures Against Hardware Trojans Exploiting Non-Zero Aliasing Probability of BIST

Dubrova, Elena ; Näslund, Mats ; Carlsson, Gunnar ; Fornehed, John and Smeets, Ben LU (2017) In Journal of Signal Processing Systems 87(3). p.371-381
Abstract

The threat of hardware Trojans has been widely recognized by academia, industry, and government agencies. A Trojan can compromise security of a system in spite of cryptographic protection. The damage caused by a Trojan may not be limited to a business or reputation, but could have a severe impact on public safety, national economy, or national security. An extremely stealthy way of implementing hardware Trojans has been presented by Becker et al. at CHES’2012. Their work have shown that it is possible to inject a Trojan in a random number generator compliant with FIPS 140-2 and NIST SP800-90 standards by exploiting non-zero aliasing probability of Logic Built-In-Self-Test (LBIST). In this paper, we present two methods for modifying... (More)

The threat of hardware Trojans has been widely recognized by academia, industry, and government agencies. A Trojan can compromise security of a system in spite of cryptographic protection. The damage caused by a Trojan may not be limited to a business or reputation, but could have a severe impact on public safety, national economy, or national security. An extremely stealthy way of implementing hardware Trojans has been presented by Becker et al. at CHES’2012. Their work have shown that it is possible to inject a Trojan in a random number generator compliant with FIPS 140-2 and NIST SP800-90 standards by exploiting non-zero aliasing probability of Logic Built-In-Self-Test (LBIST). In this paper, we present two methods for modifying LBIST to prevent such an attack. The first method makes test patterns dependent on a configurable key which is programed into a chip after the manufacturing stage. The second method uses a remote test management system which can execute LBIST using a different set of test patterns at each test cycle.

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author
; ; ; and
publishing date
type
Contribution to journal
publication status
published
subject
keywords
Countermeasure, Hardware Trojan, Logic BIST, Malicious hardware
in
Journal of Signal Processing Systems
volume
87
issue
3
pages
11 pages
publisher
Springer
external identifiers
  • scopus:84960328861
ISSN
1939-8018
DOI
10.1007/s11265-016-1127-4
language
English
LU publication?
no
additional info
Funding Information: The first author was supported in part by the research grant No SM14-0016 from the Swedish Foundation for Strategic Research. Publisher Copyright: © 2016, Springer Science+Business Media New York.
id
9ecb8b2b-9711-499f-869d-905212626417
date added to LUP
2021-11-05 02:19:22
date last changed
2022-03-11 21:16:49
@article{9ecb8b2b-9711-499f-869d-905212626417,
  abstract     = {{<p>The threat of hardware Trojans has been widely recognized by academia, industry, and government agencies. A Trojan can compromise security of a system in spite of cryptographic protection. The damage caused by a Trojan may not be limited to a business or reputation, but could have a severe impact on public safety, national economy, or national security. An extremely stealthy way of implementing hardware Trojans has been presented by Becker et al. at CHES’2012. Their work have shown that it is possible to inject a Trojan in a random number generator compliant with FIPS 140-2 and NIST SP800-90 standards by exploiting non-zero aliasing probability of Logic Built-In-Self-Test (LBIST). In this paper, we present two methods for modifying LBIST to prevent such an attack. The first method makes test patterns dependent on a configurable key which is programed into a chip after the manufacturing stage. The second method uses a remote test management system which can execute LBIST using a different set of test patterns at each test cycle.</p>}},
  author       = {{Dubrova, Elena and Näslund, Mats and Carlsson, Gunnar and Fornehed, John and Smeets, Ben}},
  issn         = {{1939-8018}},
  keywords     = {{Countermeasure; Hardware Trojan; Logic BIST; Malicious hardware}},
  language     = {{eng}},
  month        = {{06}},
  number       = {{3}},
  pages        = {{371--381}},
  publisher    = {{Springer}},
  series       = {{Journal of Signal Processing Systems}},
  title        = {{Two Countermeasures Against Hardware Trojans Exploiting Non-Zero Aliasing Probability of BIST}},
  url          = {{http://dx.doi.org/10.1007/s11265-016-1127-4}},
  doi          = {{10.1007/s11265-016-1127-4}},
  volume       = {{87}},
  year         = {{2017}},
}