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Towards Fully Pipelined Decoding of Spatially Coupled Serially Concatenated Codes

Mahdavi, Mojtaba LU orcid ; Liu, Liang LU ; Edfors, Ove LU ; Lentmaier, Michael LU ; Wehn, Norbert and Weithoffer, Stefan (2021) IEEE International Symposium on Topics in Coding (ISTC), 2021 p.1-5
Abstract
Having close-to-capacity performance and low error floor, even for small block lengths, make spatially coupled serially concatenated codes (SC-SCCs) a very promising class of codes. However, classical window decoding of SC-SCCs either limits the minimum block length or requires a large number of iterations, which increases the complexity and constrains the degree to which an SC-SCC decoder architecture can be parallelized. In this paper we propose jumping window decoding (JWD), an algorithmic modification to the scheduling of decoding such that it enables pipelined implementation of SC-SCCs decoder. Also, it provides flexibility in terms of block length and number of iterations and makes them independent of each other. Simulation results... (More)
Having close-to-capacity performance and low error floor, even for small block lengths, make spatially coupled serially concatenated codes (SC-SCCs) a very promising class of codes. However, classical window decoding of SC-SCCs either limits the minimum block length or requires a large number of iterations, which increases the complexity and constrains the degree to which an SC-SCC decoder architecture can be parallelized. In this paper we propose jumping window decoding (JWD), an algorithmic modification to the scheduling of decoding such that it enables pipelined implementation of SC-SCCs decoder. Also, it provides flexibility in terms of block length and number of iterations and makes them independent of each other. Simulation results show that our scheme outperforms classical window decoding of both SC-SCCs and uncoupled SCCs, in terms of performance. Furthermore, we present a fully pipelined hardware architecture to realize JWD of SC-SCCs along with area estimates in 12nm technology for the respective case study. (Less)
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author
; ; ; ; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
channel coding, turbo-like codes, Spatially coupled codes, VLSI Implementation, window decoding, pipeline decoding, serially concatenated convolutional codes (SCCCs), hardware architecture, decoding thresholds, decoding latency, decoding performance, Hardware Implementation, coupling memory, convolutional encoder, Throughput
host publication
IEEE International Symposium on Topics in Coding (ISTC), 2021
pages
5 pages
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
IEEE International Symposium on Topics in Coding (ISTC), 2021
conference location
Montreal, Canada
conference dates
2021-08-30 - 2021-09-03
external identifiers
  • scopus:85123449457
ISBN
978-1-6654-0944-5
978-1-6654-0943-8
DOI
10.1109/ISTC49272.2021.9594185
language
English
LU publication?
yes
id
a135b204-f63e-4e06-a407-a0f65c9c76c2
date added to LUP
2021-08-02 13:04:34
date last changed
2022-08-11 23:03:14
@inproceedings{a135b204-f63e-4e06-a407-a0f65c9c76c2,
  abstract     = {{Having close-to-capacity performance and low error floor, even for small block lengths, make spatially coupled serially concatenated codes (SC-SCCs) a very promising class of codes. However, classical window decoding of SC-SCCs either limits the minimum block length or requires a large number of iterations, which increases the complexity and constrains the degree to which an SC-SCC decoder architecture can be parallelized. In this paper we propose jumping window decoding (JWD), an algorithmic modification to the scheduling of decoding such that it enables pipelined implementation of SC-SCCs decoder. Also, it provides flexibility in terms of block length and number of iterations and makes them independent of each other. Simulation results show that our scheme outperforms classical window decoding of both SC-SCCs and uncoupled SCCs, in terms of performance. Furthermore, we present a fully pipelined hardware architecture to realize JWD of SC-SCCs along with area estimates in 12nm technology for the respective case study.}},
  author       = {{Mahdavi, Mojtaba and Liu, Liang and Edfors, Ove and Lentmaier, Michael and Wehn, Norbert and Weithoffer, Stefan}},
  booktitle    = {{IEEE International Symposium on Topics in Coding (ISTC), 2021}},
  isbn         = {{978-1-6654-0944-5}},
  keywords     = {{channel coding; turbo-like codes; Spatially coupled codes; VLSI Implementation; window decoding; pipeline decoding; serially concatenated convolutional codes (SCCCs); hardware architecture; decoding thresholds; decoding latency; decoding performance; Hardware Implementation; coupling memory; convolutional encoder; Throughput}},
  language     = {{eng}},
  month        = {{06}},
  pages        = {{1--5}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  title        = {{Towards Fully Pipelined Decoding of Spatially Coupled Serially Concatenated Codes}},
  url          = {{http://dx.doi.org/10.1109/ISTC49272.2021.9594185}},
  doi          = {{10.1109/ISTC49272.2021.9594185}},
  year         = {{2021}},
}