Analysis and design of a low-power single-stage CMOS wireless receiver
(2009) Norchip Conference, 2009 p.1-4- Abstract
- Abstract—The thorough analysis and the design of a complete
2.2 GHz quadrature receiver front-end suited for low-power
applications is reported in this work. The circuit, built in a 90nm
CMOS process, features a stacked single-ended low-noise amplifier
and a self-oscillating mixer. The oscillator LC tank is designed
to provide gain at low frequency without decreasing the quality
factor at the oscillating frequency. A careful analysis shows that
the parasitic capacitances at the output nodes ultimately limit
the achievable conversion gain.
Measurements show a conversion gain of 27.1 dB with a
14MHz bandwidth, a noise figure ranging from 12.4 to 13.2... (More) - Abstract—The thorough analysis and the design of a complete
2.2 GHz quadrature receiver front-end suited for low-power
applications is reported in this work. The circuit, built in a 90nm
CMOS process, features a stacked single-ended low-noise amplifier
and a self-oscillating mixer. The oscillator LC tank is designed
to provide gain at low frequency without decreasing the quality
factor at the oscillating frequency. A careful analysis shows that
the parasitic capacitances at the output nodes ultimately limit
the achievable conversion gain.
Measurements show a conversion gain of 27.1 dB with a
14MHz bandwidth, a noise figure ranging from 12.4 to 13.2 dB
with a flicker corner frequency of 200 kHz and an input referred
1 dB compression point of -23.7 dBm. The circuit draws only
1.3mA from a 1.0V supply. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1549517
- author
- Camponeschi, Matteo ; Bevilacqua, Andrea and Andreani, Pietro LU
- organization
- publishing date
- 2009
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- [Host publication title missing]
- pages
- 4 pages
- conference name
- Norchip Conference, 2009
- conference location
- Trondheim, Norway
- conference dates
- 2009-11-16 - 2009-11-17
- external identifiers
-
- scopus:77949601895
- ISBN
- 978-1-4244-4310-9
- DOI
- 10.1109/NORCHP.2009.5397826
- language
- English
- LU publication?
- yes
- id
- b20d71f5-3b82-463a-8da2-4daf446ee36a (old id 1549517)
- date added to LUP
- 2016-04-04 13:32:36
- date last changed
- 2022-01-30 00:29:45
@inproceedings{b20d71f5-3b82-463a-8da2-4daf446ee36a,
abstract = {{Abstract—The thorough analysis and the design of a complete<br/><br>
2.2 GHz quadrature receiver front-end suited for low-power<br/><br>
applications is reported in this work. The circuit, built in a 90nm<br/><br>
CMOS process, features a stacked single-ended low-noise amplifier<br/><br>
and a self-oscillating mixer. The oscillator LC tank is designed<br/><br>
to provide gain at low frequency without decreasing the quality<br/><br>
factor at the oscillating frequency. A careful analysis shows that<br/><br>
the parasitic capacitances at the output nodes ultimately limit<br/><br>
the achievable conversion gain.<br/><br>
Measurements show a conversion gain of 27.1 dB with a<br/><br>
14MHz bandwidth, a noise figure ranging from 12.4 to 13.2 dB<br/><br>
with a flicker corner frequency of 200 kHz and an input referred<br/><br>
1 dB compression point of -23.7 dBm. The circuit draws only<br/><br>
1.3mA from a 1.0V supply.}},
author = {{Camponeschi, Matteo and Bevilacqua, Andrea and Andreani, Pietro}},
booktitle = {{[Host publication title missing]}},
isbn = {{978-1-4244-4310-9}},
language = {{eng}},
pages = {{1--4}},
title = {{Analysis and design of a low-power single-stage CMOS wireless receiver}},
url = {{http://dx.doi.org/10.1109/NORCHP.2009.5397826}},
doi = {{10.1109/NORCHP.2009.5397826}},
year = {{2009}},
}