Portable digital clock generator for digital signal processing applications
(2003) In Electronics Letters 39(19). p.1372-1374- Abstract
- A fully integrated clock generator with behaviour similar to a PLL is proposed. A free-running ring oscillator is used as internal clock and the output clock is generated using two counters. The clock generator is described in synthesisable VHDL-code and can therefore easily be made from standard cells found in any commercial standard CMOS cell library.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/299413
- author
- Olsson, Thomas LU and Nilsson, Peter LU
- organization
- publishing date
- 2003
- type
- Contribution to journal
- publication status
- published
- subject
- in
- Electronics Letters
- volume
- 39
- issue
- 19
- pages
- 1372 - 1374
- publisher
- IEE
- external identifiers
-
- wos:000185849800007
- scopus:0142008437
- ISSN
- 1350-911X
- DOI
- 10.1049/el:20030910
- language
- English
- LU publication?
- yes
- id
- b5de8ab3-0d4d-4f4c-8b77-d42100843f01 (old id 299413)
- date added to LUP
- 2016-04-01 17:14:35
- date last changed
- 2022-04-23 03:41:42
@article{b5de8ab3-0d4d-4f4c-8b77-d42100843f01, abstract = {{A fully integrated clock generator with behaviour similar to a PLL is proposed. A free-running ring oscillator is used as internal clock and the output clock is generated using two counters. The clock generator is described in synthesisable VHDL-code and can therefore easily be made from standard cells found in any commercial standard CMOS cell library.}}, author = {{Olsson, Thomas and Nilsson, Peter}}, issn = {{1350-911X}}, language = {{eng}}, number = {{19}}, pages = {{1372--1374}}, publisher = {{IEE}}, series = {{Electronics Letters}}, title = {{Portable digital clock generator for digital signal processing applications}}, url = {{http://dx.doi.org/10.1049/el:20030910}}, doi = {{10.1049/el:20030910}}, volume = {{39}}, year = {{2003}}, }