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III-V semiconductor nanowires for future devices

Schmid, Heinz; Borg, Mattias LU ; Moselund, K.; Das Kanungo, P.; Signorello, G.; Karg, S.; Mensch, P.; Schmidt, V. and Riel, H. (2014) 17th Design, Automation and Test in Europe, DATE 2014 In Proceedings -Design, Automation and Test in Europe, DATE
Abstract

The monolithic integration of III-V nanowires on silicon by direct epitaxial growth enables new possibilities for the design and fabrication of electronic as well as optoelectronic devices. We demonstrate a new growth technique to directly integrate III-V semiconducting nanowires on silicon using selective area epitaxy within a nanotube template. Thus we achieve small diameter nanowires, controlled doping profiles and sharp heterojunctions essential for future device applications. We experimentally demonstrate vertical tunnel diodes and gate-all-around tunnel FETs based on InAs-Si nanowire heterojunctions. The results indicate the benefits of the InAs-Si material system combining the possibility of achieving high Ion with... (More)

The monolithic integration of III-V nanowires on silicon by direct epitaxial growth enables new possibilities for the design and fabrication of electronic as well as optoelectronic devices. We demonstrate a new growth technique to directly integrate III-V semiconducting nanowires on silicon using selective area epitaxy within a nanotube template. Thus we achieve small diameter nanowires, controlled doping profiles and sharp heterojunctions essential for future device applications. We experimentally demonstrate vertical tunnel diodes and gate-all-around tunnel FETs based on InAs-Si nanowire heterojunctions. The results indicate the benefits of the InAs-Si material system combining the possibility of achieving high Ion with high Ion/Ioff ratio. © 2014 EDAA.

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Please use this url to cite or link to this publication:
author
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
Esaki diodes, III-V semiconductors, nanowires, Tunnel FETs
in
Proceedings -Design, Automation and Test in Europe, DATE
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
conference name
17th Design, Automation and Test in Europe, DATE 2014
external identifiers
  • scopus:84903826882
ISBN
9783981537024
DOI
10.7873/DATE2014.247
language
English
LU publication?
no
id
b9221b7e-3b61-44db-9f2a-775e70f48612
date added to LUP
2016-04-20 10:34:07
date last changed
2017-01-01 08:23:28
@inproceedings{b9221b7e-3b61-44db-9f2a-775e70f48612,
  abstract     = {<p>The monolithic integration of III-V nanowires on silicon by direct epitaxial growth enables new possibilities for the design and fabrication of electronic as well as optoelectronic devices. We demonstrate a new growth technique to directly integrate III-V semiconducting nanowires on silicon using selective area epitaxy within a nanotube template. Thus we achieve small diameter nanowires, controlled doping profiles and sharp heterojunctions essential for future device applications. We experimentally demonstrate vertical tunnel diodes and gate-all-around tunnel FETs based on InAs-Si nanowire heterojunctions. The results indicate the benefits of the InAs-Si material system combining the possibility of achieving high I<sub>on</sub> with high I<sub>on</sub>/I<sub>off</sub> ratio. © 2014 EDAA.</p>},
  author       = {Schmid, Heinz and Borg, Mattias and Moselund, K. and Das Kanungo, P. and Signorello, G. and Karg, S. and Mensch, P. and Schmidt, V. and Riel, H.},
  booktitle    = {Proceedings -Design, Automation and Test in Europe, DATE},
  isbn         = {9783981537024},
  keyword      = {Esaki diodes,III-V semiconductors,nanowires,Tunnel FETs},
  language     = {eng},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  title        = {III-V semiconductor nanowires for future devices},
  url          = {http://dx.doi.org/10.7873/DATE2014.247},
  year         = {2014},
}