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On-Chip Fault Monitoring Using Self-Reconfiguring IEEE 1687 Networks

Ghani Zadegan, Farrokh LU ; Nikolov, Dimitar LU and Larsson, Erik LU (2017) In IEEE Transactions on Computers
Abstract

Efficient handling of faults during operation is highly dependent on the interval (latency) from the time embedded monitoring instruments detect faults to the time when the fault manager localizes the faults. In this article, we propose a self-reconfiguring IEEE 1687 network in which all instruments that have detected faults are automatically included in the scan path, and a fault detection and localization module in hardware that detects the configuration of the network after self-reconfiguration and extracts the error codes reported by the fault monitoring instruments. To enable self-reconfiguration, we propose a modified segment insertion bit (SIB) compliant to IEEE 1687. We provide time analyses on fault detection and fault... (More)

Efficient handling of faults during operation is highly dependent on the interval (latency) from the time embedded monitoring instruments detect faults to the time when the fault manager localizes the faults. In this article, we propose a self-reconfiguring IEEE 1687 network in which all instruments that have detected faults are automatically included in the scan path, and a fault detection and localization module in hardware that detects the configuration of the network after self-reconfiguration and extracts the error codes reported by the fault monitoring instruments. To enable self-reconfiguration, we propose a modified segment insertion bit (SIB) compliant to IEEE 1687. We provide time analyses on fault detection and fault localization for single and multiple faults, and suggest how the self-reconfiguring IEEE 1687 network should be designed such that time for fault detection and fault localization is kept low and deterministic. We show that compared to previous schemes, our proposed network significantly reduces the fault localization time. For validation, we implemented a number of self-reconfiguring networks as well as their corresponding fault detection and localization modules in hardware, and performed post-layout simulations. We show that for large number of instruments, implementing the fault detection and localization module in hardware results in less area compared with the corresponding software-based implementation. Another benefit of the hardware implementation over its software counterpart is that to achieve the same fault detection and localization time, the hardware module can be clocked at a lower frequency than the core on which the corresponding software implementation would run.

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Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
epub
subject
keywords
Circuit faults, Fault detection, fault monitoring, Hardware, IEEE 1687, Instruments, Integrated circuits, Monitoring, self-reconfiguration, Software, time analysis
in
IEEE Transactions on Computers
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • scopus:85028915402
ISSN
0018-9340
DOI
10.1109/TC.2017.2731338
language
English
LU publication?
yes
id
be29c107-a115-40e2-8360-3e9533a43d02
date added to LUP
2017-09-27 12:23:09
date last changed
2018-01-07 12:19:36
@article{be29c107-a115-40e2-8360-3e9533a43d02,
  abstract     = {<p>Efficient handling of faults during operation is highly dependent on the interval (latency) from the time embedded monitoring instruments detect faults to the time when the fault manager localizes the faults. In this article, we propose a self-reconfiguring IEEE 1687 network in which all instruments that have detected faults are automatically included in the scan path, and a fault detection and localization module in hardware that detects the configuration of the network after self-reconfiguration and extracts the error codes reported by the fault monitoring instruments. To enable self-reconfiguration, we propose a modified segment insertion bit (SIB) compliant to IEEE 1687. We provide time analyses on fault detection and fault localization for single and multiple faults, and suggest how the self-reconfiguring IEEE 1687 network should be designed such that time for fault detection and fault localization is kept low and deterministic. We show that compared to previous schemes, our proposed network significantly reduces the fault localization time. For validation, we implemented a number of self-reconfiguring networks as well as their corresponding fault detection and localization modules in hardware, and performed post-layout simulations. We show that for large number of instruments, implementing the fault detection and localization module in hardware results in less area compared with the corresponding software-based implementation. Another benefit of the hardware implementation over its software counterpart is that to achieve the same fault detection and localization time, the hardware module can be clocked at a lower frequency than the core on which the corresponding software implementation would run.</p>},
  author       = {Ghani Zadegan, Farrokh and Nikolov, Dimitar and Larsson, Erik},
  issn         = {0018-9340},
  keyword      = {Circuit faults,Fault detection,fault monitoring,Hardware,IEEE 1687,Instruments,Integrated circuits,Monitoring,self-reconfiguration,Software,time analysis},
  language     = {eng},
  month        = {07},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Transactions on Computers},
  title        = {On-Chip Fault Monitoring Using Self-Reconfiguring IEEE 1687 Networks},
  url          = {http://dx.doi.org/10.1109/TC.2017.2731338},
  year         = {2017},
}