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Algorithm and implementation of the K-best sphere decoding for MIMO detection

Guo, Zhan and Nilsson, Peter LU (2006) In IEEE Journal on Selected Areas in Communications 24(3). p.491-503
Abstract
K-best Schnorr-Euchner (KSE) decoding algorithm is proposed in this paper to approach near-maximum-likelihood (ML) performance for multiple-input-multiple-output (MIMO) detection. As a low complexity MIMO decoding algorithm, the KSE is shown to be suitable for very large scale integration (VLSI) implementations and be capable or supporting soft outputs. Modified KSE (MKSE) decoding algorithm is further proposed to improve the performance of the soft-output KSE with minor modifications. Moreover, a VLSI architecture is proposed for both algorithms. There are several low complexity and low-power features incorporated in the proposed algorithms and the VLSI architecture. The proposed hard-output KSE decoder and the soft-output MKSE decoder is... (More)
K-best Schnorr-Euchner (KSE) decoding algorithm is proposed in this paper to approach near-maximum-likelihood (ML) performance for multiple-input-multiple-output (MIMO) detection. As a low complexity MIMO decoding algorithm, the KSE is shown to be suitable for very large scale integration (VLSI) implementations and be capable or supporting soft outputs. Modified KSE (MKSE) decoding algorithm is further proposed to improve the performance of the soft-output KSE with minor modifications. Moreover, a VLSI architecture is proposed for both algorithms. There are several low complexity and low-power features incorporated in the proposed algorithms and the VLSI architecture. The proposed hard-output KSE decoder and the soft-output MKSE decoder is implemented for 4 x 4 16-quadrature amplitude modulation (QAM) MIMO detection in a 0.35-mu m and a 0.13-mu m CMOS technology, respectively. The implemented hard-output KSE chip core is 5.76 mm(2) with 91 K gates. The KSE decoding throughput is up to 53.3 Mb/s with a core power consumption of 626 mW at 100 MHz clock frequency and 2.8 V supply. The implemented soft-output MKSE chip can achieve a decoding throughput of more than 100 Mb/s with a 0.56 mm(2) core area and 97 K gates. The implementation results show that it is feasible to achieve near-ML performance and high detection throughput for a 4 x 4 16-QAM MIMO system using the proposed algorithms and the VLSI architecture with reasonable complexity. (Less)
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author
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
Schnorr-Euchner algorithm, sphere decoder, very large scale integration (VLSI), multiple-input-multiple-output (MIMO)
in
IEEE Journal on Selected Areas in Communications
volume
24
issue
3
pages
491 - 503
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • wos:000236289300009
  • scopus:33644990835
ISSN
1558-0008
DOI
10.1109/JSAC.2005.862402
language
English
LU publication?
yes
id
df848115-8c33-4daf-8c1c-5b770f0474d9 (old id 415182)
date added to LUP
2007-10-03 13:41:32
date last changed
2018-07-15 04:15:34
@article{df848115-8c33-4daf-8c1c-5b770f0474d9,
  abstract     = {K-best Schnorr-Euchner (KSE) decoding algorithm is proposed in this paper to approach near-maximum-likelihood (ML) performance for multiple-input-multiple-output (MIMO) detection. As a low complexity MIMO decoding algorithm, the KSE is shown to be suitable for very large scale integration (VLSI) implementations and be capable or supporting soft outputs. Modified KSE (MKSE) decoding algorithm is further proposed to improve the performance of the soft-output KSE with minor modifications. Moreover, a VLSI architecture is proposed for both algorithms. There are several low complexity and low-power features incorporated in the proposed algorithms and the VLSI architecture. The proposed hard-output KSE decoder and the soft-output MKSE decoder is implemented for 4 x 4 16-quadrature amplitude modulation (QAM) MIMO detection in a 0.35-mu m and a 0.13-mu m CMOS technology, respectively. The implemented hard-output KSE chip core is 5.76 mm(2) with 91 K gates. The KSE decoding throughput is up to 53.3 Mb/s with a core power consumption of 626 mW at 100 MHz clock frequency and 2.8 V supply. The implemented soft-output MKSE chip can achieve a decoding throughput of more than 100 Mb/s with a 0.56 mm(2) core area and 97 K gates. The implementation results show that it is feasible to achieve near-ML performance and high detection throughput for a 4 x 4 16-QAM MIMO system using the proposed algorithms and the VLSI architecture with reasonable complexity.},
  author       = {Guo, Zhan and Nilsson, Peter},
  issn         = {1558-0008},
  keyword      = {Schnorr-Euchner algorithm,sphere decoder,very large scale integration (VLSI),multiple-input-multiple-output (MIMO)},
  language     = {eng},
  number       = {3},
  pages        = {491--503},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Journal on Selected Areas in Communications},
  title        = {Algorithm and implementation of the K-best sphere decoding for MIMO detection},
  url          = {http://dx.doi.org/10.1109/JSAC.2005.862402},
  volume       = {24},
  year         = {2006},
}