1 – 2 of 2
- show: 10
- |
- sort: year (new to old)
Close
Embed this list
<iframe src=""
width=""
height=""
allowtransparency="true"
frameborder="0">
</iframe>
- 2010
-
Mark
Thermal Aware Test Scheduling for Stacked Multi-Chip-Modules
Vinay, N.S. ; Rawat, Indira ; Gaur, M.S. ; Larsson, Erik LU
and Singh, Virendra
(2010)
IEEE East-West Design and Test Symposium (EWDTS10)
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2009
-
Mark
Thermal Aware Test Scheduling for Stacked Multi-Chip-Modules
Vinay, N.S. ; Larsson, Erik LU
and Singh, Virendra
(2009)
DATE 2009 Friday Workshop on 3D Integration - Technology, Architecture, Design, Automation, and Tes
- Contribution to conference › Paper, not in proceeding