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- 2002
-
Mark
Architectural tradeoffs for a custom implementation of an acoustic echo canceller
2002) NORSIG(
- Contribution to conference › Paper, not in proceeding
-
Mark
A Pipelined FFT Processor using Data Scaling and Reduced Memory Requirements
2002) Norchip Conference, 2002(
- Contribution to conference › Paper, not in proceeding
-
Mark
A new System-on-Chip Curriculum at Lund University
2002) European Workshop on Microelectronics Education (EWME)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Optimised QR-Decomposition Core for Adaptive Beamforming
2002) Nordic Radio Science and Communication Conference 2002(
- Contribution to conference › Paper, not in proceeding
-
Mark
Controller Synthesis for Hardware Accelerator Design
2002) Swedish System-on-Chip Conference 2002 (SSoCC 02)(
- Contribution to conference › Paper, not in proceeding
- 2001
-
Mark
Precision Issues in the implementation of BCJR decoders
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
QRS detection for pacemakers in a noisy environment using a time lagged artificial neural network
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2000
-
Mark
A low logic depth complex multiplier using distributed arithmetic
(
- Contribution to journal › Article
-
Mark
Co-optimization of FFT and FIR in a delayless acoustic echo canceller implementation
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1999
-
Mark
A custom image convolution DSP with a sustained calculation capacity of >1 GMAC/s and low I/O bandwidth
(
- Contribution to journal › Article