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- 2017
- Architecture Design of a Memory Subsystem for Massive MIMO Baseband Processing
- The World's First Real-Time Testbed for Massive MIMO: Design, Implementation, and Validation
- Reducing On-chip Memory for Massive MIMO Baseband Processing using Channel Compression
- Implementation of Low-latency Signal Processing and Data Shuffling for TDD massive MIMO Systems
- 2015
- Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing: From Algorithm to Architecture
- A New Approach to Sign-Bit Based Parameter Estimation in OFDM Receivers
- Adaptive Resource Scheduling for Energy Efficient QRD Processor with DVFS
- A 350 uW Sign-Bit Architecture for Multi-parameter Estimation During OFDM Acquisition in 65nm CMOS
- Energy Efficient Group-Sort QRD Processor with On-line Update for MIMO Channel Pre-processing
- A Heterogeneous Reconfigurable Cell Array for MIMO Signal Processing