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A programmable 16-lane SIMD ASIP for massive MIMO

Malkowsky, Steffen LU ; Prabhu, Hemanth LU ; Liu, Liang LU ; Edfors, Ove LU and Öwall, Viktor LU (2019) 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 2019.
Abstract

This paper presents a 16-lane, 16-bit complex application-specific instruction processor (ASIP) for baseband processing in massive multiple-input multiple-output (MIMO). The architecture utilizes a 3/4-way very large instruction word (VLIW) with highly efficient pre- and post-processing units specifically trimmed for massive MIMO requirements. Architecture optimizations include features like single cycle vector-dot-product, vector indexing and broadcasting, hardware loops and full complex accumulator to provide high performance for various massive MIMO algorithms. Moreover, the ASIP is fully C-programmable, which is crucial for adapting to the evolving 5G standard. In our evaluation, a full massive MIMO up-link detection is executed in... (More)

This paper presents a 16-lane, 16-bit complex application-specific instruction processor (ASIP) for baseband processing in massive multiple-input multiple-output (MIMO). The architecture utilizes a 3/4-way very large instruction word (VLIW) with highly efficient pre- and post-processing units specifically trimmed for massive MIMO requirements. Architecture optimizations include features like single cycle vector-dot-product, vector indexing and broadcasting, hardware loops and full complex accumulator to provide high performance for various massive MIMO algorithms. Moreover, the ASIP is fully C-programmable, which is crucial for adapting to the evolving 5G standard. In our evaluation, a full massive MIMO up-link detection is executed in ≈11k clock cycles while synthesis results in ST 28 nm FD-SOI suggest a clock frequency of 900 MHz equating in a detection throughput of 330 Mb/s for a 128×16 massive MIMO system.

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author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
host publication
2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
volume
2019
publisher
Institute of Electrical and Electronics Engineers Inc.
conference name
2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
conference location
Sapporo, Japan
conference dates
2019-05-26 - 2019-05-29
external identifiers
  • scopus:85066795061
ISBN
9781728103976
DOI
10.1109/ISCAS.2019.8702770
language
English
LU publication?
yes
id
7645fbed-5207-4f98-8107-f1e5562f1d08
date added to LUP
2019-06-24 12:17:47
date last changed
2019-07-09 04:49:13
@inproceedings{7645fbed-5207-4f98-8107-f1e5562f1d08,
  abstract     = {<p>This paper presents a 16-lane, 16-bit complex application-specific instruction processor (ASIP) for baseband processing in massive multiple-input multiple-output (MIMO). The architecture utilizes a 3/4-way very large instruction word (VLIW) with highly efficient pre- and post-processing units specifically trimmed for massive MIMO requirements. Architecture optimizations include features like single cycle vector-dot-product, vector indexing and broadcasting, hardware loops and full complex accumulator to provide high performance for various massive MIMO algorithms. Moreover, the ASIP is fully C-programmable, which is crucial for adapting to the evolving 5G standard. In our evaluation, a full massive MIMO up-link detection is executed in ≈11k clock cycles while synthesis results in ST 28 nm FD-SOI suggest a clock frequency of 900 MHz equating in a detection throughput of 330 Mb/s for a 128×16 massive MIMO system.</p>},
  author       = {Malkowsky, Steffen and Prabhu, Hemanth and Liu, Liang and Edfors, Ove and Öwall, Viktor},
  isbn         = {9781728103976},
  language     = {eng},
  location     = {Sapporo, Japan},
  publisher    = {Institute of Electrical and Electronics Engineers Inc.},
  title        = {A programmable 16-lane SIMD ASIP for massive MIMO},
  url          = {http://dx.doi.org/10.1109/ISCAS.2019.8702770},
  volume       = {2019},
  year         = {2019},
}