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- 2012
-
Mark
A receiver architecture for devices in wireless body area networks
2012) In IEEE Journal on Emerging and Selected Topics in Circuits and Systems(
- Contribution to journal › Article
- 2011
-
Mark
Design exploration of a 65 nm Sub-VT CMOS digital decimation filter chain
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Physical implementation of analog circuits assisted by conventional digital place and route methods
2011) CDNLive! EMEA, 2011(
- Contribution to conference › Other
- 2010
-
Mark
Ultra low energy vs throughput design exploration of 65 nm sub-VT CMOS digital filters
2010) NORCHIP Conference, 2010(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding