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- 2023
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Mark
A General Purpose Near Data Processing Architecture Optimized for Data-intensive Applications
(
- Master (Two yrs)
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Mark
Using Approximate Computing Circuits to Optimize Power of an ASIC
(
- Master (Two yrs)
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Mark
Simulation and Testing of a MU-MIMO Beamforming System
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- Master (Two yrs)
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Mark
Design of a 13-Bit SAR ADC with kT/C noise cancellation technique
(
- Master (Two yrs)
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Mark
Evaluation and Optimization of LTE-V2X Mode 4 under Aperiodic Messages of Variable Size
(
- Master (Two yrs)
-
Mark
Evaluation of Ferroelectric Tunnel Junction memristor for in-memory computation in real world use cases
(
- Master (Two yrs)
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Mark
Real-time remote processing enabled by high speed Ethernet
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- Master (Two yrs)
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Mark
Investigation of Analog Calibration Systems for Spurious Tone Suppression in Frequency Triplers
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- Master (Two yrs)
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Mark
Ray-tracing Based Investigations on the Deployment of RISs in Indoor Scenarios
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- Master (Two yrs)
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Mark
Novel Method of ASIC interface IP development using HLS
(
- Master (Two yrs)