A
(2010) 18th IEEE/IFIP International Conference on VLSI and System-on-Chip p.253-258- Abstract
- This paper presents the hardware implementation
of a wavelet based event detector for cardiac pacemakers. A
high level energy estimation flow was applied to evaluate energy
efficiency of standard-cell based designs, over several CMOS
technology generations, from 180 to 65 nm, operated in the
sub-threshold domain. The simulation results indicate a 65 nm
low-leakage high-threshold (LL-HVT) CMOS technology as the favourable choice. Accordingly, the design was fabricated in 65 nm LL-HVT CMOS. Measurements validate the simulation results and prove that the circuit is fully functional down to a supply voltage of 250mV. At the energy minimum voltage of 320mV the circuit dissipates 0.88 pJ per... (More) - This paper presents the hardware implementation
of a wavelet based event detector for cardiac pacemakers. A
high level energy estimation flow was applied to evaluate energy
efficiency of standard-cell based designs, over several CMOS
technology generations, from 180 to 65 nm, operated in the
sub-threshold domain. The simulation results indicate a 65 nm
low-leakage high-threshold (LL-HVT) CMOS technology as the favourable choice. Accordingly, the design was fabricated in 65 nm LL-HVT CMOS. Measurements validate the simulation results and prove that the circuit is fully functional down to a supply voltage of 250mV. At the energy minimum voltage of 320mV the circuit dissipates 0.88 pJ per sample at a clock rate
of 20 kHz. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1648314
- author
- Rodrigues, Joachim LU ; Akgun, OmerCan LU and Öwall, Viktor LU
- organization
- publishing date
- 2010
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- Proceedings of the 2010 18TH IEEE/IFIP International Conference on VLSI and System-on-Chip
- pages
- 6 pages
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- 18th IEEE/IFIP International Conference on VLSI and System-on-Chip
- conference location
- Madrid, Spain
- conference dates
- 2010-09-27 - 2010-09-29
- external identifiers
-
- wos:000295220400045
- ISBN
- 978-1-4244-6469-2
- project
- Digital ASIC: Implementation of Signal Processing Algorithms for Pacemakers
- language
- English
- LU publication?
- yes
- id
- df9d4016-a79d-46d6-9aa0-2518688fdbd2 (old id 1648314)
- date added to LUP
- 2016-04-04 11:10:58
- date last changed
- 2018-11-21 21:03:11
@inproceedings{df9d4016-a79d-46d6-9aa0-2518688fdbd2, abstract = {{This paper presents the hardware implementation<br/><br> of a wavelet based event detector for cardiac pacemakers. A<br/><br> high level energy estimation flow was applied to evaluate energy<br/><br> efficiency of standard-cell based designs, over several CMOS<br/><br> technology generations, from 180 to 65 nm, operated in the<br/><br> sub-threshold domain. The simulation results indicate a 65 nm<br/><br> low-leakage high-threshold (LL-HVT) CMOS technology as the favourable choice. Accordingly, the design was fabricated in 65 nm LL-HVT CMOS. Measurements validate the simulation results and prove that the circuit is fully functional down to a supply voltage of 250mV. At the energy minimum voltage of 320mV the circuit dissipates 0.88 pJ per sample at a clock rate<br/><br> of 20 kHz.}}, author = {{Rodrigues, Joachim and Akgun, OmerCan and Öwall, Viktor}}, booktitle = {{Proceedings of the 2010 18TH IEEE/IFIP International Conference on VLSI and System-on-Chip}}, isbn = {{978-1-4244-6469-2}}, language = {{eng}}, pages = {{253--258}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{A}}, url = {{https://lup.lub.lu.se/search/files/5713562/1648326.pdf}}, year = {{2010}}, }