Coarse grain clock gating of streaming applications in programmable logic implementations
(2014) Electronic System Level Synthesis Conference (ESLsyn) p.1-6
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/7991120
- author
- Bezati, Endri ; Casale Brunet, Simone ; Mattavelli, Marco and Janneck, Jörn LU
- organization
- publishing date
- 2014
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- [Host publication title missing]
- pages
- 1 - 6
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- Electronic System Level Synthesis Conference (ESLsyn)
- conference location
- San Francisco, United States
- conference dates
- 2014-05-31 - 2015-06-01
- external identifiers
-
- scopus:84905379522
- ISBN
- 979-10-92279-00-9
- DOI
- 10.1109/ESLsyn.2014.6850387
- language
- English
- LU publication?
- yes
- id
- 94cd457f-84dc-4038-95dd-54f63edc5add (old id 7991120)
- date added to LUP
- 2016-04-04 12:11:35
- date last changed
- 2022-03-31 19:40:48
@inproceedings{94cd457f-84dc-4038-95dd-54f63edc5add,
author = {{Bezati, Endri and Casale Brunet, Simone and Mattavelli, Marco and Janneck, Jörn}},
booktitle = {{[Host publication title missing]}},
isbn = {{979-10-92279-00-9}},
language = {{eng}},
pages = {{1--6}},
publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
title = {{Coarse grain clock gating of streaming applications in programmable logic implementations}},
url = {{http://dx.doi.org/10.1109/ESLsyn.2014.6850387}},
doi = {{10.1109/ESLsyn.2014.6850387}},
year = {{2014}},
}