Nanometer-scale two-terminal semiconductor memory operating at room temperature
(2005) In Applied Physics Letters 86(4).- Abstract
- Based on a nanometer-scale semiconductor channel with an intentionally broken geometric symmetry, we have realized a type of memory device that consists of only two terminals, rather than the minimum of three terminals in conventional semiconductor memories. The charge retention time is at least 10 h at cryogenic temperatures and a few minutes at room temperature. Furthermore, the simplicity of the design allows the active part of the devices to be made in a single nanolithography step which, along with the planar structure of the device, provides promising possibilities for a high integration density. (C) 2005 American Institute of Physics.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/912199
- author
- Song, Aimin LU ; Missous, M ; Omling, Pär LU ; Maximov, Ivan LU ; Seifert, Werner LU and Samuelson, Lars LU
- organization
- publishing date
- 2005
- type
- Contribution to journal
- publication status
- published
- subject
- in
- Applied Physics Letters
- volume
- 86
- issue
- 4
- article number
- 042106
- publisher
- American Institute of Physics (AIP)
- external identifiers
-
- wos:000226761400037
- scopus:13644278175
- ISSN
- 0003-6951
- DOI
- 10.1063/1.1852711
- language
- English
- LU publication?
- yes
- id
- 165b10cc-db8a-4121-b447-a524fc7b3a93 (old id 912199)
- date added to LUP
- 2016-04-01 12:20:08
- date last changed
- 2022-04-05 21:00:32
@article{165b10cc-db8a-4121-b447-a524fc7b3a93, abstract = {{Based on a nanometer-scale semiconductor channel with an intentionally broken geometric symmetry, we have realized a type of memory device that consists of only two terminals, rather than the minimum of three terminals in conventional semiconductor memories. The charge retention time is at least 10 h at cryogenic temperatures and a few minutes at room temperature. Furthermore, the simplicity of the design allows the active part of the devices to be made in a single nanolithography step which, along with the planar structure of the device, provides promising possibilities for a high integration density. (C) 2005 American Institute of Physics.}}, author = {{Song, Aimin and Missous, M and Omling, Pär and Maximov, Ivan and Seifert, Werner and Samuelson, Lars}}, issn = {{0003-6951}}, language = {{eng}}, number = {{4}}, publisher = {{American Institute of Physics (AIP)}}, series = {{Applied Physics Letters}}, title = {{Nanometer-scale two-terminal semiconductor memory operating at room temperature}}, url = {{http://dx.doi.org/10.1063/1.1852711}}, doi = {{10.1063/1.1852711}}, volume = {{86}}, year = {{2005}}, }