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An Adaptive QR Decomposition Processor for Carrier Aggregated LTE-A in 28 nm FD-SOI

Gangarajaiah, Rakesh LU ; Edfors, Ove LU orcid and Liu, Liang LU orcid (2017) In IEEE Transactions on Circuits and Systems I: Regular Papers
Abstract
This paper presents an adaptive QR decomposition (QRD) processor for five-band carrier aggregated LTE-A
downlinks. The design uses time and frequency correlation
properties of wireless channels to reduce QRD computations
while maintaining an uncoded bit error rate loss below 1 dB.
An analysis on the performance of a linear interpolating QRD is
presented and optimum distances for different channel conditions
are suggested. The Householder transform suited for spatially
correlated scenarios is chosen and modified for concurrent vector
rotations resulting in high throughput. Based on these, a parallel
hardware architecture suitable for easy reconfigurability and low power is developed and fabricated in 28... (More)
This paper presents an adaptive QR decomposition (QRD) processor for five-band carrier aggregated LTE-A
downlinks. The design uses time and frequency correlation
properties of wireless channels to reduce QRD computations
while maintaining an uncoded bit error rate loss below 1 dB.
An analysis on the performance of a linear interpolating QRD is
presented and optimum distances for different channel conditions
are suggested. The Householder transform suited for spatially
correlated scenarios is chosen and modified for concurrent vector
rotations resulting in high throughput. Based on these, a parallel
hardware architecture suitable for easy reconfigurability and low power is developed and fabricated in 28 nm FD-SOI technology. The QRD unit occupies 205 k gates of logic and has a maximum throughput of 22 M QRD/s while consuming 29 mW of power. On a circuit level, the back gate feature is leveraged to double operational frequency in low time-frequency correlation channels or to lower power consumption to 1.9 mW in favorable conditions. The proposed system provides designers with multiple levels of adaptive control from architectural to circuit level for power-performance trade-offs and is well suited for mobile devices operating on limited battery energy. (Less)
Please use this url to cite or link to this publication:
author
; and
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
LTE-A, QRD, Adaptive processing
in
IEEE Transactions on Circuits and Systems I: Regular Papers
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • scopus:85013685640
  • wos:000404294900025
ISSN
1549-8328
DOI
10.1109/TCSI.2017.2658729
language
English
LU publication?
yes
id
e7305442-86b3-40d3-9b4c-73f515355815
date added to LUP
2017-02-27 09:15:07
date last changed
2024-01-13 15:48:10
@article{e7305442-86b3-40d3-9b4c-73f515355815,
  abstract     = {{This paper presents an adaptive QR decomposition (QRD) processor for five-band carrier aggregated LTE-A<br/>downlinks. The design uses time and frequency correlation<br/>properties of wireless channels to reduce QRD computations<br/>while maintaining an uncoded bit error rate loss below 1 dB.<br/>An analysis on the performance of a linear interpolating QRD is<br/>presented and optimum distances for different channel conditions<br/>are suggested. The Householder transform suited for spatially<br/>correlated scenarios is chosen and modified for concurrent vector<br/>rotations resulting in high throughput. Based on these, a parallel<br/>hardware architecture suitable for easy reconfigurability and low power is developed and fabricated in 28 nm FD-SOI technology. The QRD unit occupies 205 k gates of logic and has a maximum throughput of 22 M QRD/s while consuming 29 mW of power. On a circuit level, the back gate feature is leveraged to double operational frequency in low time-frequency correlation channels or to lower power consumption to 1.9 mW in favorable conditions. The proposed system provides designers with multiple levels of adaptive control from architectural to circuit level for power-performance trade-offs and is well suited for mobile devices operating on limited battery energy.}},
  author       = {{Gangarajaiah, Rakesh and Edfors, Ove and Liu, Liang}},
  issn         = {{1549-8328}},
  keywords     = {{LTE-A, QRD, Adaptive processing}},
  language     = {{eng}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  series       = {{IEEE Transactions on Circuits and Systems I: Regular Papers}},
  title        = {{An Adaptive QR Decomposition Processor for Carrier Aggregated LTE-A in 28 nm FD-SOI}},
  url          = {{http://dx.doi.org/10.1109/TCSI.2017.2658729}},
  doi          = {{10.1109/TCSI.2017.2658729}},
  year         = {{2017}},
}