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A 2.8-to-5.8 GHz harmonic VCO in a 28 nm UTBB FD-SOI CMOS process

Fanori, Luca ; Mahmoud, Ahmed LU ; Mattsson, Thomas ; Caputa, Peter ; Rämö, Sami and Andreani, Piero LU (2015) IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2015 p.195-198
Abstract
A 2.8-to-5.8GHz VCO designed in a 28nm UTBB FD-SOI CMOS process adopts a reconfigurable active core to save power at the lower oscillation frequencies, and to enable a trade-off between power consumption and phase noise at all frequencies. The UTBB FD-SOI CMOS process is instrumental to achieve a tuning range in excess of one octave at low power consumption, while the use of an 8-shaped tank coil yields a VCO that is highly insensitive to external magnetic fields. The VCO operates from 0.9V and has a figure-of-merit of 186-189 dBc/Hz, depending on the oscillation frequency and the configuration of the oscillator core. The active area of the VCO is 380 μm × 700 μm.
Please use this url to cite or link to this publication:
author
; ; ; ; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
UTBB FD-SOI, CMOS, reconfigurable core, VCO, one octave, class-B, low phase noise
host publication
2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
pages
195 - 198
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2015
conference location
Phoenix, Arizona, United States
conference dates
2015-05-17 - 2015-05-19
external identifiers
  • scopus:84975726990
ISBN
978-1-4799-7642-3
DOI
10.1109/RFIC.2015.7337738
language
English
LU publication?
yes
id
45ea9c80-f204-4de1-8fc0-aa785e184304
date added to LUP
2016-05-31 11:19:05
date last changed
2022-05-02 03:36:11
@inproceedings{45ea9c80-f204-4de1-8fc0-aa785e184304,
  abstract     = {{A 2.8-to-5.8GHz VCO designed in a 28nm UTBB FD-SOI CMOS process adopts a reconfigurable active core to save power at the lower oscillation frequencies, and to enable a trade-off between power consumption and phase noise at all frequencies. The UTBB FD-SOI CMOS process is instrumental to achieve a tuning range in excess of one octave at low power consumption, while the use of an 8-shaped tank coil yields a VCO that is highly insensitive to external magnetic fields. The VCO operates from 0.9V and has a figure-of-merit of 186-189 dBc/Hz, depending on the oscillation frequency and the configuration of the oscillator core. The active area of the VCO is 380 μm × 700 μm.}},
  author       = {{Fanori, Luca and Mahmoud, Ahmed and Mattsson, Thomas and Caputa, Peter and Rämö, Sami and Andreani, Piero}},
  booktitle    = {{2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)}},
  isbn         = {{978-1-4799-7642-3}},
  keywords     = {{UTBB FD-SOI; CMOS; reconfigurable core; VCO; one octave; class-B; low phase noise}},
  language     = {{eng}},
  pages        = {{195--198}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  title        = {{A 2.8-to-5.8 GHz harmonic VCO in a 28 nm UTBB FD-SOI CMOS process}},
  url          = {{http://dx.doi.org/10.1109/RFIC.2015.7337738}},
  doi          = {{10.1109/RFIC.2015.7337738}},
  year         = {{2015}},
}