Jörn Janneck (Former)

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<iframe src="https://lup.lub.lu.se/search/person/52ee3334-1c3b-499d-b6e7-09478fdfac60?embed=1&amp;hide_pagination=1&amp;hide_info=1&amp;hide_options=1"
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2016
Mark Clock-gating of streaming applications for energy efficient implementations on FPGAs
Bezati, Endri ; Casale Brunet, Simone ; Mattavelli, Marco and Janneck, Jörn ^LU (2016) In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems p.699-703
- Contribution to journal › Article
Mark High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms
Bezati, Endri ; Casale Brunet, Simone ; Mattavelli, Marco and Janneck, Jörn ^LU (2016) International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XVI) p.227-234
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Processes and actors: Translating Kahn processes to dataflow with firing
Cedersjö, Gustav ^LU and Janneck, Jörn ^LU (2016) International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XVI) p.21-30
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Content-based caching in a managed runtime computing environment
Janneck, Jörn ^LU and Miller, Ian D. (2016) 9,411,744
- Patent › Patent
Mark Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques : Two Examples of Bounded Buffer Scheduling: Deadlock Avoidance and Deadlock Recovery Strategies
Canale, M. ; Casale-Brunet, S. ; Bezati, E. ; Mattavelli, M. and Janneck, J. ^LU (2016) In Journal of Signal Processing Systems 84(3). p.371-381
- Contribution to journal › Article
Mark Implementing a streaming application on a processor array : A case study on the Epiphany architecture
Lindstrom, Jerry ; Nanneson, Stefan and Janneck, Jörn ^LU (2016) 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015 2016-February. p.177-181
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
2015
Mark Method of generating data for estimating resource requirements for a circuit design
Schumacher, Paul R. ; Miller, Ian D. ; Parlour, David B. ; Janneck, Jörn ^LU and Jha, Pradip Kumar (2015) US9117046 (B1)
- Patent › Patent
2014
Mark Dataflow machines
Janneck, Jörn ^LU ; Cedersjö, Gustav ^LU ; Bezati, Endri and Casale Brunet, Simone (2014) 48th Asilomar Conference on Signals, Systems and Computers, 2014 p.1848-1852
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling
Canala, Massimo ; Casale Brunet, Simone ; Bezati, Endri ; Mattavelli, Marco and Janneck, Jörn ^LU (2014) 2014 IEEE Workshop on Signal Processing Systems p.1-6
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Turnus: An open-source design space exploration framework for dynamic stream programs
Casale Brunet, Simone ; Wisniewska, Malgorzata ; Bezati, Endri ; Mattavelli, Marco and Janneck, Jörn ^LU (2014) Design and Architectures for Signal and Image Processing (DASIP) p.1-2
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding