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Vertical InAs/InGaAsSb/GaSb Nanowire Tunnel FETs on Si with Drain Field-Plate and EOT = 1 nm Achieving Smin= 32 mV/dec and gm/ID= 100 V-1

Krishnaraja, Abinaya LU ; Svensson, Johannes LU and Wernersson, Lars Erik LU (2020) 2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020 p.17-18
Abstract

We present vertical InAs/InGaAsSb/GaSb nanowire tunnel FETs (TFETs) on Si demonstrating subthreshold swing (S) of 32 mV/dec with ION = 4 µA/µm for IOFF = 1 nA/µm at VDS = 0.3V. The demonstrated drive currents is the highest reported for a TFET with S below 40 mV/dec resulting in a transconductance efficiency as high as 100 V-1. These results have been achieved by optimizing the source segment growth scheme and the device processing. The devices are compliant with low-power logic applications capable of operation at IOFF = 100 pA/µm.

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author
; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
host publication
2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
article number
9131656
pages
2 pages
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
conference location
Honolulu, United States
conference dates
2020-06-13 - 2020-06-14
external identifiers
  • scopus:85092170110
ISBN
9781728197357
DOI
10.1109/SNW50361.2020.9131656
language
English
LU publication?
yes
id
0e7e9bfe-ed06-48e9-b045-2b00b292dd8c
date added to LUP
2020-11-04 16:01:51
date last changed
2022-04-19 01:42:33
@inproceedings{0e7e9bfe-ed06-48e9-b045-2b00b292dd8c,
  abstract     = {{<p>We present vertical InAs/InGaAsSb/GaSb nanowire tunnel FETs (TFETs) on Si demonstrating subthreshold swing (S) of 32 mV/dec with ION = 4 µA/µm for IOFF = 1 nA/µm at VDS = 0.3V. The demonstrated drive currents is the highest reported for a TFET with S below 40 mV/dec resulting in a transconductance efficiency as high as 100 V-1. These results have been achieved by optimizing the source segment growth scheme and the device processing. The devices are compliant with low-power logic applications capable of operation at IOFF = 100 pA/µm.</p>}},
  author       = {{Krishnaraja, Abinaya and Svensson, Johannes and Wernersson, Lars Erik}},
  booktitle    = {{2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020}},
  isbn         = {{9781728197357}},
  language     = {{eng}},
  pages        = {{17--18}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  title        = {{Vertical InAs/InGaAsSb/GaSb Nanowire Tunnel FETs on Si with Drain Field-Plate and EOT = 1 nm Achieving S<sub>min</sub>= 32 mV/dec and g<sub>m</sub>/I<sub>D</sub>= 100 V<sup>-1</sup>}},
  url          = {{http://dx.doi.org/10.1109/SNW50361.2020.9131656}},
  doi          = {{10.1109/SNW50361.2020.9131656}},
  year         = {{2020}},
}