Advanced

Energy-minimum sub-threshold self-timed circuits using current sensing completion detection

Akgun, OmerCan LU ; Rodrigues, Joachim LU and Sparsø, Jens (2011) 16th IEEE International Symposium on Asynchronous Circuits and Systems In IET Computers and Digital Techniques 5(4). p.342-353
Abstract
This study addresses the design of self-timed energy-minimum circuits, operating in the sub-VT domain and a generic implementation template using bundled-data circuitry and current sensing completion detection (CSCD). Furthermore, a fully decoupled latch controller was developed, which integrates with the current-sensing circuitry. Different configurations that utilise the proposed latch controller are highlighted. A contemporary synchronous electronic design automation tools-based design flow, which transforms a synchronous design into a corresponding self-timed circuit, is outlined. Different use cases of the CSCD system are examined. The design flow and the current-sensing technique are validated by the implementation of a self-timed... (More)
This study addresses the design of self-timed energy-minimum circuits, operating in the sub-VT domain and a generic implementation template using bundled-data circuitry and current sensing completion detection (CSCD). Furthermore, a fully decoupled latch controller was developed, which integrates with the current-sensing circuitry. Different configurations that utilise the proposed latch controller are highlighted. A contemporary synchronous electronic design automation tools-based design flow, which transforms a synchronous design into a corresponding self-timed circuit, is outlined. Different use cases of the CSCD system are examined. The design flow and the current-sensing technique are validated by the implementation of a self-timed version of a wavelet-based event detector for cardiac pacemaker applications in a standard 65 nm CMOS process. The chip was fabricated and verified to operate down to 250 mV. Spice simulations indicate a gain of 52.58% in throughput because of asynchronous operation. By trading the throughput improvement, energy dissipation is reduced by 16.8% at the energy-minimum supply voltage. (Less)
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
ASYNCHRONOUS CIRCUITS, CMOS INTEGRATED CIRCUITS, CMOS DIGITAL INTEGRATED CIRCUITS, VLSI
in
IET Computers and Digital Techniques
volume
5
issue
4
pages
342 - 353
publisher
Institution of Engineering and Technology
conference name
16th IEEE International Symposium on Asynchronous Circuits and Systems
external identifiers
  • scopus:79960271960
  • wos:000292591600014
ISSN
1751-8601
DOI
10.1049/iet-cdt.2010.0118
language
English
LU publication?
yes
id
37c5f69b-9b33-404b-b18f-edb7746465dd (old id 1832641)
date added to LUP
2011-03-01 14:23:31
date last changed
2017-01-01 03:08:34
@article{37c5f69b-9b33-404b-b18f-edb7746465dd,
  abstract     = {This study addresses the design of self-timed energy-minimum circuits, operating in the sub-VT domain and a generic implementation template using bundled-data circuitry and current sensing completion detection (CSCD). Furthermore, a fully decoupled latch controller was developed, which integrates with the current-sensing circuitry. Different configurations that utilise the proposed latch controller are highlighted. A contemporary synchronous electronic design automation tools-based design flow, which transforms a synchronous design into a corresponding self-timed circuit, is outlined. Different use cases of the CSCD system are examined. The design flow and the current-sensing technique are validated by the implementation of a self-timed version of a wavelet-based event detector for cardiac pacemaker applications in a standard 65 nm CMOS process. The chip was fabricated and verified to operate down to 250 mV. Spice simulations indicate a gain of 52.58% in throughput because of asynchronous operation. By trading the throughput improvement, energy dissipation is reduced by 16.8% at the energy-minimum supply voltage.},
  author       = {Akgun, OmerCan and Rodrigues, Joachim and Sparsø, Jens},
  issn         = {1751-8601},
  keyword      = {ASYNCHRONOUS CIRCUITS,CMOS INTEGRATED CIRCUITS,CMOS DIGITAL INTEGRATED CIRCUITS,VLSI},
  language     = {eng},
  number       = {4},
  pages        = {342--353},
  publisher    = {Institution of Engineering and Technology},
  series       = {IET Computers and Digital Techniques},
  title        = {Energy-minimum sub-threshold self-timed circuits using current sensing completion detection},
  url          = {http://dx.doi.org/10.1049/iet-cdt.2010.0118},
  volume       = {5},
  year         = {2011},
}