Surfaces and interfaces of low dimensional III-V semiconductor devices
(2022)- Abstract
- The demand for fast and energy efficient (opto-)electronic applications needs high mobility semiconductor materials, such as InAs with a very high electron mobility and GaSb with a very high hole mobility. Beyond the material itself, also an innovative device geometry is needed, for example, the gate-all-around geometry that provides higher efficiency and electrostatic control for computational units. Vertically or laterally grown nanowires and nanosheets are excellent candidates for realizing such beneficial device geometries. The logic operations and charge transport could be realized in different device architectures, such as the concepts of tunnelFETs instead of classical FETs or new neuromorphic hardware instead of complementary... (More)
- The demand for fast and energy efficient (opto-)electronic applications needs high mobility semiconductor materials, such as InAs with a very high electron mobility and GaSb with a very high hole mobility. Beyond the material itself, also an innovative device geometry is needed, for example, the gate-all-around geometry that provides higher efficiency and electrostatic control for computational units. Vertically or laterally grown nanowires and nanosheets are excellent candidates for realizing such beneficial device geometries. The logic operations and charge transport could be realized in different device architectures, such as the concepts of tunnelFETs instead of classical FETs or new neuromorphic hardware instead of complementary metal-oxide-semiconductor (CMOS).
With both the excellent functional properties of III-V materials and the flexibility of nanostructuring into 1D nanowires and 2D nanosheets, III-V semiconductors could be the stars for next-generation applications. For example, lateral grown InxGa1−xAs nanowires have a high spin-orbit coupling and moderate bandgap promising for quantum computing devices. GaSb nanowires are excellent high-speed p-channels for III-V CMOS, and InAs/InP nanowires have an energy barrier in the axial direction which can be used for photovoltaic and sensor applications. Due to the high surface-to-bulk ratio of nanowires and nanosheets, their surface condition becomes the key to the device performance. In this work, III-V nanowire and nanosheet devices are studied with an emphasis on surfaces and interfaces, using a wide range of characterization methods. The dissertation explores the fabrication of novel nano-devices and the characterization of their surface chemistry, topography, electronic properties, electrical transport and interaction with photons.
The characterization techniques include scanning tunneling microscopy/spectroscopy (STM/S) for atomic level topography and electronic properties. Development of a Scanning gate microscopy (SGM) system with additional single-mode focused lasers for simultaniously probing influence of static and optical fields. Synchrotron based X-ray techniques, mainly X-ray photoelectron spectroscopy (XPS) is used for evaluating surface chemistry. Surface treatment processes, e.g., ultra-high vacuum (UHV) annealing, digital etchants, atomic hydrogen cleaning, and atomic layer deposition (ALD), are applied and the resulting surface chemistry, structure and electronic properties measured. Beyond studying the surface properties, we also investigate the device efficiency and performance down to the nanometer scale. Therefore, we perform measurements to monitor the device while the local gate and/or a focused light interact with the device.
In conclusion, in this thesis the surfaces and interfaces of low-dimensional materials for future device applications are studied using many different characterization methods. It is the hope that the thesis will assist in the progress toward novel devices and improve the energy efficiency and performance of devices. Both the method development and the results give relevant contributions opening for future quantum technologies and (opto)electronics.
(Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1c72989b-6b81-4a4a-a4b3-1ee8c348b79a
- author
- Liu, Yen-Po LU
- supervisor
-
- Anders Mikkelsen LU
- Rainer Timm LU
- opponent
-
- Professor Grandidier, Bruno, Univ. Lille, CNRS, Centrale Lille, Univ. Polytechnique Hauts-de-France, Junia-ISEN
- organization
- publishing date
- 2022-09-30
- type
- Thesis
- publication status
- published
- subject
- keywords
- III-V semiconductor, nanowires, nanosheet, nano-device fabrication, STM, AFM, SGM, OBIC, XPS, Fysicumarkivet A:2022:Liu
- pages
- 122 pages
- publisher
- Media-Tryck, Lund University, Sweden
- defense location
- Rydbergsalen, Fysiska institutionen. Join via Zoom: https://lu-se.zoom.us/j/63831639908?pwd=RFBZQ211N3gvRWtBSmxaSmdpVG04dz09 passcode: 883257
- defense date
- 2022-10-28 13:15:00
- ISBN
- 978-91-8039-399-7
- 978-91-8039-400-0
- language
- English
- LU publication?
- yes
- id
- 1c72989b-6b81-4a4a-a4b3-1ee8c348b79a
- date added to LUP
- 2022-09-30 14:31:07
- date last changed
- 2022-10-25 14:45:50
@phdthesis{1c72989b-6b81-4a4a-a4b3-1ee8c348b79a, abstract = {{The demand for fast and energy efficient (opto-)electronic applications needs high mobility semiconductor materials, such as InAs with a very high electron mobility and GaSb with a very high hole mobility. Beyond the material itself, also an innovative device geometry is needed, for example, the gate-all-around geometry that provides higher efficiency and electrostatic control for computational units. Vertically or laterally grown nanowires and nanosheets are excellent candidates for realizing such beneficial device geometries. The logic operations and charge transport could be realized in different device architectures, such as the concepts of tunnelFETs instead of classical FETs or new neuromorphic hardware instead of complementary metal-oxide-semiconductor (CMOS).<br/><br/>With both the excellent functional properties of III-V materials and the flexibility of nanostructuring into 1D nanowires and 2D nanosheets, III-V semiconductors could be the stars for next-generation applications. For example, lateral grown InxGa1−xAs nanowires have a high spin-orbit coupling and moderate bandgap promising for quantum computing devices. GaSb nanowires are excellent high-speed p-channels for III-V CMOS, and InAs/InP nanowires have an energy barrier in the axial direction which can be used for photovoltaic and sensor applications. Due to the high surface-to-bulk ratio of nanowires and nanosheets, their surface condition becomes the key to the device performance. In this work, III-V nanowire and nanosheet devices are studied with an emphasis on surfaces and interfaces, using a wide range of characterization methods. The dissertation explores the fabrication of novel nano-devices and the characterization of their surface chemistry, topography, electronic properties, electrical transport and interaction with photons. <br/><br/>The characterization techniques include scanning tunneling microscopy/spectroscopy (STM/S) for atomic level topography and electronic properties. Development of a Scanning gate microscopy (SGM) system with additional single-mode focused lasers for simultaniously probing influence of static and optical fields. Synchrotron based X-ray techniques, mainly X-ray photoelectron spectroscopy (XPS) is used for evaluating surface chemistry. Surface treatment processes, e.g., ultra-high vacuum (UHV) annealing, digital etchants, atomic hydrogen cleaning, and atomic layer deposition (ALD), are applied and the resulting surface chemistry, structure and electronic properties measured. Beyond studying the surface properties, we also investigate the device efficiency and performance down to the nanometer scale. Therefore, we perform measurements to monitor the device while the local gate and/or a focused light interact with the device.<br/><br/>In conclusion, in this thesis the surfaces and interfaces of low-dimensional materials for future device applications are studied using many different characterization methods. It is the hope that the thesis will assist in the progress toward novel devices and improve the energy efficiency and performance of devices. Both the method development and the results give relevant contributions opening for future quantum technologies and (opto)electronics.<br/>}}, author = {{Liu, Yen-Po}}, isbn = {{978-91-8039-399-7}}, keywords = {{III-V semiconductor; nanowires; nanosheet; nano-device fabrication; STM; AFM; SGM; OBIC; XPS; Fysicumarkivet A:2022:Liu}}, language = {{eng}}, month = {{09}}, publisher = {{Media-Tryck, Lund University, Sweden}}, school = {{Lund University}}, title = {{Surfaces and interfaces of low dimensional III-V semiconductor devices}}, year = {{2022}}, }