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Accurate sample-and-hold circuit model

Xu, Gang LU and Yuan, Jiren LU (2005) In Electronics Letters 41(9). p.520-522
Abstract
An accurate circuit model is presented for the general sample-and-hold circuit with a finite sampling duration. The applications of the model, such as to design a direct down-conversion sampler (RF sampler) and to calculate the thermal noise and output SNR of the general sample-and-hold circuit, are discussed. The results provide a theoretical basis for understanding and designing a sample-and-hold circuit.
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author
organization
publishing date
type
Contribution to journal
publication status
published
subject
in
Electronics Letters
volume
41
issue
9
pages
520 - 522
publisher
IEE
external identifiers
  • wos:000228925400007
  • scopus:18744409102
ISSN
1350-911X
DOI
10.1049/el:20050088
language
English
LU publication?
yes
id
400e5ec8-234f-408c-a6c8-b57f3d739360 (old id 243766)
date added to LUP
2007-08-06 12:56:09
date last changed
2017-01-01 07:17:26
@article{400e5ec8-234f-408c-a6c8-b57f3d739360,
  abstract     = {An accurate circuit model is presented for the general sample-and-hold circuit with a finite sampling duration. The applications of the model, such as to design a direct down-conversion sampler (RF sampler) and to calculate the thermal noise and output SNR of the general sample-and-hold circuit, are discussed. The results provide a theoretical basis for understanding and designing a sample-and-hold circuit.},
  author       = {Xu, Gang and Yuan, Jiren},
  issn         = {1350-911X},
  language     = {eng},
  number       = {9},
  pages        = {520--522},
  publisher    = {IEE},
  series       = {Electronics Letters},
  title        = {Accurate sample-and-hold circuit model},
  url          = {http://dx.doi.org/10.1049/el:20050088},
  volume       = {41},
  year         = {2005},
}