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Test Scheduling and Test Access Optimization for Core-Based 3D Stacked ICs with Through-Silicon Vias: poster

Sengupta, Breeta LU ; Ingelsson, Urban and Larsson, Erik LU (2011) IEEE European Test Symposium (ETS), 2011
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author
organization
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type
Contribution to conference
publication status
published
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conference name
IEEE European Test Symposium (ETS), 2011
language
English
LU publication?
no
id
66253d7d-4b1d-4b5e-bc76-67058e367f2b (old id 4305344)
date added to LUP
2014-02-13 10:44:45
date last changed
2016-04-16 12:02:58
@misc{66253d7d-4b1d-4b5e-bc76-67058e367f2b,
  author       = {Sengupta, Breeta and Ingelsson, Urban and Larsson, Erik},
  language     = {eng},
  title        = {Test Scheduling and Test Access Optimization for Core-Based 3D Stacked ICs with Through-Silicon Vias: poster},
  year         = {2011},
}