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A Digital Baseband for Low Power FSK Based Receiver in 65 nm CMOS

Sherazi, Syed Muhammad Yasser LU ; Sjöland, Henrik LU orcid and Nilsson, Peter LU (2014) IEEE 21th International Conference on Electronics, Circuits and Systems, 2014
Abstract
The design of a digital baseband for a low power wireless receiver in 65 nm CMOS is presented. It consists of decimation filtering, matched filters for data detection, and preamble based synchronization. The circuit was designed using low threshold devices in both low power (LP-LVT) and general-purpose (GP-LVT) domains. The fabricated circuits were functionally verified, and silicon measurements show a minimum energy dissipation of around 454 pJ and 708 pJ per output bit at a rate of 500 kbit/s for the LP-LVT and GP-LVT implementations, respectively.
Please use this url to cite or link to this publication:
author
; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
host publication
[Host publication title missing]
pages
4 pages
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
IEEE 21th International Conference on Electronics, Circuits and Systems, 2014
conference location
Marseille, France
conference dates
2014-12-07 - 2014-12-10
language
English
LU publication?
yes
id
ff85c452-b764-4ebd-be32-9181c68c6327 (old id 4882576)
date added to LUP
2016-04-04 10:39:56
date last changed
2019-04-30 21:38:35
@inproceedings{ff85c452-b764-4ebd-be32-9181c68c6327,
  abstract     = {{The design of a digital baseband for a low power wireless receiver in 65 nm CMOS is presented. It consists of decimation filtering, matched filters for data detection, and preamble based synchronization. The circuit was designed using low threshold devices in both low power (LP-LVT) and general-purpose (GP-LVT) domains. The fabricated circuits were functionally verified, and silicon measurements show a minimum energy dissipation of around 454 pJ and 708 pJ per output bit at a rate of 500 kbit/s for the LP-LVT and GP-LVT implementations, respectively.}},
  author       = {{Sherazi, Syed Muhammad Yasser and Sjöland, Henrik and Nilsson, Peter}},
  booktitle    = {{[Host publication title missing]}},
  language     = {{eng}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  title        = {{A Digital Baseband for Low Power FSK Based Receiver in 65 nm CMOS}},
  year         = {{2014}},
}