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Modeling of n-InAs metal oxide semiconductor capacitors with high-kappa gate dielectric

Shiri Babadi, Aein LU ; Lind, Erik LU and Wernersson, Lars-Erik LU (2014) In Applied Physics Reviews 116(21).
Abstract
A qualitative analysis on capacitance-voltage and conductance data for high-kappa/InAs capacitors is presented. Our measured data were evaluated with a full equivalent circuit model, including both majority and minority carriers, as well as interface and border traps, formulated for narrow band gap metal-oxide-semiconductor capacitors. By careful determination of interface trap densities, distribution of border traps across the oxide thickness, and taking into account the bulk semiconductor response, it is shown that the trap response has a strong effect on the measured capacitances. Due to the narrow bandgap of InAs, there can be a large surface concentration of electrons and holes even in depletion, so a full charge treatment is... (More)
A qualitative analysis on capacitance-voltage and conductance data for high-kappa/InAs capacitors is presented. Our measured data were evaluated with a full equivalent circuit model, including both majority and minority carriers, as well as interface and border traps, formulated for narrow band gap metal-oxide-semiconductor capacitors. By careful determination of interface trap densities, distribution of border traps across the oxide thickness, and taking into account the bulk semiconductor response, it is shown that the trap response has a strong effect on the measured capacitances. Due to the narrow bandgap of InAs, there can be a large surface concentration of electrons and holes even in depletion, so a full charge treatment is necessary. (C) 2014 AIP Publishing LLC. (Less)
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author
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organization
publishing date
type
Contribution to journal
publication status
published
subject
in
Applied Physics Reviews
volume
116
issue
21
article number
214508
publisher
American Institute of Physics (AIP)
external identifiers
  • wos:000346007400055
  • scopus:84915747334
ISSN
1931-9401
DOI
10.1063/1.4903520
language
English
LU publication?
yes
id
ca0cc1d6-8176-41f9-8b1c-ba1b51b784e7 (old id 4957525)
date added to LUP
2016-04-01 10:04:58
date last changed
2021-10-06 03:02:25
@article{ca0cc1d6-8176-41f9-8b1c-ba1b51b784e7,
  abstract     = {A qualitative analysis on capacitance-voltage and conductance data for high-kappa/InAs capacitors is presented. Our measured data were evaluated with a full equivalent circuit model, including both majority and minority carriers, as well as interface and border traps, formulated for narrow band gap metal-oxide-semiconductor capacitors. By careful determination of interface trap densities, distribution of border traps across the oxide thickness, and taking into account the bulk semiconductor response, it is shown that the trap response has a strong effect on the measured capacitances. Due to the narrow bandgap of InAs, there can be a large surface concentration of electrons and holes even in depletion, so a full charge treatment is necessary. (C) 2014 AIP Publishing LLC.},
  author       = {Shiri Babadi, Aein and Lind, Erik and Wernersson, Lars-Erik},
  issn         = {1931-9401},
  language     = {eng},
  number       = {21},
  publisher    = {American Institute of Physics (AIP)},
  series       = {Applied Physics Reviews},
  title        = {Modeling of n-InAs metal oxide semiconductor capacitors with high-kappa gate dielectric},
  url          = {http://dx.doi.org/10.1063/1.4903520},
  doi          = {10.1063/1.4903520},
  volume       = {116},
  year         = {2014},
}